Cirrus Logic Inc.

Joseph Chacko

Daniel G Bezzant

Nagina Naresh Shetty

Ramprasad Rangarajan

A clock frequency multiplier with a rise detector flip-flop connected to a series of buffers having interspersed parallel output taps connected to a binary to Gray converter for providing real time rise status indications. The parallel tap outputs are connected to first, second and third multiplexers, to produce first and second fall outputs and a second rise output. The multiplexers are controlled by first, second and third corresponding tap circuits having hexadecimal inputs from a Gray to hexadecimal converter connected to the output of the binary to Gray converter through a flip-flop clocked by a second rise of the input clock signal.

Growing community of inventors

San Jose, CA, United States of America

Joseph Chacko