Westinghouse Electric Corporation

Northrop Grumman Systems Corporation

Joseph C Kotvas

Harvey C Nathanson

Robert Miles Young

Carl Baldwin Freidhoff

Michael C Driver

Saptharishi Sriram

Timothy T Braggins

James G Oakes

Varley L Wrick

A semiconductor wafer and a method of forming vias in a semiconductor wafer having opposite first and second planar surfaces and predetermined thickness includes forming a plurality of first channels of first predetermined depth along a first direction in the first planar surface of the semiconductor wafer and forming a plurality of second channels of second predetermined depth along a second direction in the second planar surface of the semiconductor wafer. The first and second predetermined depths of the channels are selected such that vias are formed through the semiconductor wafer. The channels may be formed by saw cutting or scribing the planar surfaces of the semiconductor wafer. A plurality of circuit devices may be formed on the first planar surface of the semiconductor wafer prior to forming the plurality of first and second channels. A metallic layer is deposited within the vias and on the first and second planar surfaces to provide electrical connection between the circuit devices and the second planar surface of the semiconductor wafer through the vias.

Integrated circuit non-etch technique for forming vias in a

A method for forming a solid state mass spectrograph for analyzing a sample gas is provided in which a plurality of cavities are formed in a substrate, preferably, a semiconductor. Each of these cavities forms a chamber into which a different component of the mass spectrograph is provided. A plurality of orifices are formed between each of the cavities, forming an interconnecting passageway between each of the chambers. A dielectric layer is provided inside the cavities to serve as a separator between the substrate and electrodes to be later deposited in the cavity. An ionizer is provided in one of the cavities and an ion detector is provided in another of the cavities. The formed substrate is provided in a circuit board which contains interfacing and controlling electronics for the mass spectrograph. Preferably, the substrate is formed in two halves and the chambers are formed in a corresponding arrangement in each of the substrate halves. The substrate halves are then bonded together after the components are provided therein.

Method for manufacturing a miniaturized solid state mass spectrograph

A method of tuning a microwave integrated circuit by trimming desired film-type circuit patterns included therein by a cold-pressure bonding technique is disclosed. More specifically, intercoupled circuit patterns are formed on a semi-insulating substrate with some circuit patterns having impedance characteristics of a desired nominal value. Each circuit pattern may comprise a plurality of conductive paths of malleable metal. Gaps are provided at appropriately chosen places in the conductive paths of predetermined circuit patterns. Selected ones of the gaps of the conductive paths are bridged to adjust the impedance characteristics of the associated predetermined circuit pattern by wiping with a probe the malleable metal of the conductive path at one end of the gap, across the gap to make contact with the malleable metal of the conductive path at the other end of the gap. The method further includes steps for in-situ testing of the integrated circuit by energizing the microwave integrated circuit to effect operation thereof; testing selected parameters of the energized microwave integrated circuit for determining the operational response thereof; and performing the step of bridging selected gaps of the energized microwave integrated circuit with a probe of insulating material to adjust the impedance characteristics thereof to render a desired measure response therefrom as determined by the testing step.

Method for tuning a microwave integrated circuit

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Monroeville, PA, United States of America

Joseph C Kotvas