Xerox Corporation

Sprint Communications Comapny L.p.

Other

Com21, Inc.

Telesis Technologies Laboratory

Newbridge Networks Corporation

Joseph B Lyles

Alan G Bell

Daniel H Greene

Bryan Thomas Preas

Helen M Davis

Scott M Quinn

Rebecca Isaacs

Landis C Rogers

Mark E Laubach

Christopher J Kappler

Timothy Roscoe

William T Smith

Paul V Grantham

An access control system for a computing environment in which a number of processing nodes are interconnected to one another via an interconnection system. Multiple program applications, each made up of a number of application components, are installed in the environment, such that their components may be distributed among the various processing nodes of the platform. A set of rules is established, indicating allowed inter-node communications between the application components, and those rules are mapped onto a set of logic in the platform. The logic may be embodied in various forms, such as packet-filtering logic in a network interconnect switch, or firewall logic in a processing node. In turn, when an application component on one node attempts to communication with another application component on another node, a determination can be made whether the communication is allowed and, if the communication is not allowed, the communication can be blocked.

Method and system for communication control in a computing environment

A communication device for exchanging communication between user devices and a communication network reduces power consumption after detecting a low power condition. The communication device advantageously operates during a power outage when a power supply for the communication device fails. The communication device includes a network interface, a power control circuitry, and a processor. The network interface exchanges digital communication signals with the communication network. The power control circuitry detects a low power condition. The power control circuitry then generates a power control signal in response to the low power condition. The processor exchanges first communication signals between the network interface and an analog telephone interface or a digital computer interface. The processor receives and processes the power control signal to lower power consumption of the communication device.

Low power communication device

A method in accordance with the invention allocates bandwidth, fairly and dynamically, in a shared-media packet switched network to accommodate both elastic and inelastic applications. The method, executed by or in a head-end controller, allocates bandwidth transmission slots, converting requests for bandwidth into virtual scheduling times for granting access to the shared media. The method can use a weighted fair queuing algorithm or a virtual clock algorithm to generate a sequence of upstream slot/transmission assignment grants. The method supports multiple quality of service (QoS) classes via mechanisms which give highest priority to the service class with the most stringent QoS requirements.

Method for providing integrated packet services over a shared-media network

The present invention is a method and apparatus for providing a general-purpose, multifunction, individually addressable, full-bandwidth bi-directional communication device with built-in Authentication, Authorization, and Accounting (AAA) capabilities that connects a home or business user with ATM and other switched broadband digital networks in a convenient, adaptable, extensible manner at reasonable cost. The device supports a Document Services Architecture (DSA) and, in particular, supports agent-based communications (including interaction with an Agent Instance Service) to ensure well-behaved communications and fair allocation of network resources among users. The device can be used in a heterogeneous environment and with different types of networks and protocols. The full-bandwidth bi-directional communication and built-in AAA capabilities of the device distinguish it from other 'set-top boxes.'

Document communications controller

Access to a limited bandwidth switching network of an ATM (Asynchronous Transfer Mode) switch is scheduled using a reservation ring. In general, a limited bandwidth switching network is unable to generate all possible one-to-one input to output channel mappings in a single switch cycle. The limited bandwidth switching network includes one or more routing channels for routing at most B data packets each switch cycle between the input channels and output channels, where the number of data packets B is less than the aggregate output bandwidth that can be directed at the routing channels. Arbitration requests make two passes around the reservation ring each arbitration cycle. Output channel contention is settled during the first pass around the reservation ring. Contention for limited switching network bandwidth is settled during the second pass around the reservation ring. Arbitration requests granted a reservation at the end of an arbitration cycle are issued into the limited bandwidth switching network during a subsequent switch cycle.

Arbitration ring for accessing a limited bandwidth switching network

A self-arbitrating and self-routing ATM (Asynchronous Transfer Mode) switch has a switching fabric consisting of rows and columns of logic groups. The rows of logic groups have addressing logic for routing data packets received at input ports to the columns of logic groups. Arbitration logic in each of the columns of logic groups route data packets received from the addressing logic to their specified output ports. The arbitration logic forming each column of logic groups resolves conflicts between data packets contending for an identical output port. Additional logic in each column of logic groups signals input ports when data packets are successfully received by their specified output ports. Data packets which lose arbitration during a switch cycle are assigned a higher priority and retransmitted to the switching fabric during the next switch cycle.

Self-arbitrating crossbar switch

Method for providing integrated packet services over a shared-media

Ports of an ATM (Asynchronous Transfer Mode) switch are consolidated into cluster modules to increase the aggregate throughput of the switch. Packets are routed between cluster modules using an intercluster switching network. The intercluster switching network includes a plurality of input channels and output channels. During a switch cycle, a maximum of 'K' packets are delivered to each of the output channels of the intercluster switching network. This maximum of 'K' packets is a speedup per cluster module that is shared between ports of each cluster module. Consequently, each output port of a cluster module operates with a peak speedup of up to 'K' packets per switch cycle thereby increasing the aggregate throughput of the switch.

ATM switch with output port clustering for dynamically allocating

A method controls multicast cell access to a switching network with a reservation ring in an ATM (Asynchronous Transfer Mode) switch. The switching network distributes the multicast cell in one or more passes from an input channel to one or more output channels of the switch during a switch cycle. An arbitration session for a multicast cell begins by submitting an arbitration request identifying a set of destination output channels to the reservation ring. During an arbitration cycle, the output channels in the set of destination output channels are arbitrated for over the reservation ring. The arbitration request is reissued during later arbitration cycles until access to each of the destination output channels in the set of output channels is granted.

Method for supporting multicast capabilities in switching networks with

A non-blocking switching network for routing packets from a plurality of inputs to a plurality of outputs includes a reservation ring mechanism for resolving conflicts among inputs contending for access to specified ones of said outputs. This reservation ring performs a sequence of step and compare operations in top-to-bottom ring-like order during at least one arbitration cycle for granting contending inputs access to said specified outputs in a top-to-bottom order that is also consistent with the order required by self-clocked weighted fair queueing or, alternatively, virtual clock, with up to a maximum permissible plural number of contenders being given access to such an output on each of the arbitration cycles.

Reservation ring mechanism for providing fair queued access in a fast

An expandable, self routing switching fabric routes data packets in an ATM switch. A crosspoint array of state machines disposed at internal intersections of input ports and output ports have predetermined identities representative of the output ports and include a comparator for identifying an address header of each data packet with the state machine identity. When a match occurs, the state machine is set active/connected and when a non-match occurs, the state machine is set not-active/disconnected. A circuit through the fabric is set by connection between an input port through an active/connected state machine to a desired output port. The predetermined identity of each state machine comprises a hard wired bit sequence common to the column including the state machines.

Self routing crossbar switch suitable for use as a switching fabric in

A crossbar switching fabric for routing data packets in an ATM switch. A logic unit associated with a reservation ring in an ATM switch intercepts data exiting a selected evaluator of the reservation ring, and processes this data to set-up a crossbar switching fabric for routing data packets of the ATM switch. The set-up data may be passed to the crossbar switching fabric upon each clock cycle thereby not incurring any pipeline processing delays. Alternatively, the set-up data is accumulated and stored in the logic unit until the completion of an arbitration session, whereafter it is sent to the crossbar. In place of the logic unit a plurality of registers may be added to each of the evaluators of the reservation ring. The registers in turn interconnected to each other in a shift register arrangement to provide the set-up data to the crossbar fabric.

Device and method for use of a reservation ring to compute crossbar

A switching network having a sorting network followed by a plurality of routing networks for routing packets from a plurality of inputs to a plurality of outputs in accordance with destination addresses specified by the packets includes a reservation ring mechanism for resolving conflicts among inputs contending for access to identical outputs. This reservation ring mechanism performs a sequence of step and compare operations in top-to-bottom ring-like order during one or more arbitration cycles for granting contending inputs access to the outputs for which those inputs are contending in top-to-bottom order. Each of the routing networks can route packets from any input to any output, so up to k packets are routed to each output during each arbitration cycle, where k equals the number of routing networks that are employed.

Modification to a reservation ring mechanism for controlling contention

A non-blocking, self-routing switch having a sorting network followed by a plurality of routing networks for routing packets from a plurality of inputs to a plurality of outputs includes a reservation ring mechanism for resolving conflicts among inputs contending for access to identical outputs. This reservation ring mechanism shifts a reservation vector in top-to-bottom ring-like order during at least one arbitration cycle for granting contending inputs access to identical outputs in top-to-bottom order, with a maximum permissible plural number of contenders being given access to such an output on each of said arbitration cycles whenever there still are at least said plural number of contenders in contention for that particular output. The reservation vector is composed of a plurality of bits for registering reservations for each of the outputs.

Reservation ring mechanism for controlling contention in a broadband

A switch having a non-blocking, self-routing switching fabric for routing packets from the input ports to the output ports of the switching fabric in accordance with a virtual circuit designation and an output port address that is carried by each packet requires that the output port address for each of the packets being specified by the first few bits of a switch header that is appended to said packet. The switching fabric advantageously is composed of a plurality of parallel connected single bit wide sorting networks followed by a plurality of parallel connected routing networks for providing multi-bit wide data paths between its input ports and its output ports. Moreover, the switching fabric is constructed to have one multi-bit wide sorting network and a plurality of multi-bit wide routing networks for giving plural input ports simultaneous access to identical output ports. For that reason, the address bits for each of the packets are transmitted in bit parallel on all bits of said multi-bit wide data path, together with a prepended stopper ID that distinquishes each packet from any other packet that can be simultaneously routed to the same output port of said switching fabric, thereby preventing packets from different inputs from being intermingled at said output ports.

Growing community of inventors

Mountain View, CA, United States of America

Joseph B Lyles