Infineon Technologies Ag

Infineon Technologies North America Corp.

Josef Maynollo

Alois Gutmann

Chandrasekhar Sarma

Sajan Marokkey

Henning Haffner

Thomas Detzel

Frank Weber

Marcus Culmsee

Methods of fabricating semiconductor devices and structures thereof are disclosed. In a preferred embodiment, a method of fabricating a semiconductor device includes providing a workpiece having a plurality of trenches formed therein, forming a liner over the workpiece, and forming a layer of photosensitive material over the liner. The layer of photosensitive material is removed from over the workpiece except from over at least a portion of each of the plurality of trenches. The layer of photosensitive material is partially removed from over the workpiece, leaving a portion of the layer of photosensitive material remaining within a lower portion of the plurality of trenches over the liner.

Semiconductor devices and methods of manufacture thereof

A power semiconductor component and a method for the production of a power semiconductor component are disclosed. According to one embodiment of the invention, a topmost metallization region that is provided is formed in a manner extended laterally and outside contacts formed, in such a way that, as a result, a protection and sealing material region to be provided is formed, while avoiding electrically insulating additional protection and sealing layers that are usually to be provided.

Power semiconductor component and method for the production thereof

A power semiconductor component and a method for the production of a power semiconductor component are disclosed. According to one embodiment of the invention, a topmost metallization region that is provided is formed in a manner extended laterally and outside contacts formed, in such a way that, as a result, a protection and sealing material region to be provided is formed, whilst avoiding electrically insulating additional protection and sealing layers that are usually to be provided.

Power semiconductor component having a topmost metallization layer

Lithography masks and methods of manufacture thereof are disclosed. A preferred embodiment comprises a method of manufacturing a lithography mask. The method includes providing a substrate, forming a first pattern in a first region of the substrate, and forming a second pattern in a second region of the substrate, the second pattern comprising patterns for features oriented differently than patterns for features of the first pattern. The method includes affecting a polarization rotation of light differently in the first region than in the second region of the substrate.

Lithography masks and methods of manufacture thereof

A method for controlling etching during photolithography in the fabrication of an integrated circuit in connection with first and second features that are formed on the integrated circuit having a gap there between comprising depositing a layer of photoresist on the integrated circuit, selectively exposing portions of the photoresist through at least one photolithography mask having a pattern including means for alleviating line end shortening of the first and second lines adjacent the gap, and developing the photoresist after the selective exposing step.

Small feature integrated circuit fabrication

Methods of fabricating semiconductor devices are disclosed. In a preferred embodiment, a method of fabricating a semiconductor device includes providing a workpiece including a plurality of active area regions defined therein, and forming at least one trench in the workpiece between at least two of the plurality of active area regions. A first insulating material is deposited over the plurality of active area regions and the at least one trench, partially filling the at least one trench with the first insulating material and forming peaks of the first insulating material over the plurality of active area regions. A masking material is formed over the first insulating material in the at least one trench, leaving the peaks of the first insulating material over the plurality of active area regions completely exposed. At least the peaks of the first insulating material are removed from over the plurality of active area regions.

Growing community of inventors

Wappingers Falls, NY, United States of America

Josef Maynollo