Texas Instruments Corporation

Analog Devices,inc.

Analog Devices International Unlimited Company

Analog Devices Global Unlimited Company

Jose Tejada

Rafael Dominguez-Castro

Miguel A Ruiz

Fernando Medeiro-Hidalgo

Francisco J Jimenez-Garrido

Hirokazu Sawada

Santiago Iriarte

Amit Kumar Singh

Sriram Ganesan

Alberto Riera Sanchez

Cristina Azcona

Fernando Medeiro

Michele Spaggiari

Francisco J Jimenez

Techniques for improving efficiency of a switched-capacitor voltage regulator are provided. In an example, a switched-capacitor voltage regulator can include a switched-capacitor network having multiple gain configurations, a clock configured to switch capacitors of the switched-capacitor network between a charge state and a discharge state to provide a scaled output voltage, and a controller configured to select a capacitor configuration associated with a gain of the multiple gain configurations to provide the scaled output voltage within a desired output voltage range while continuously switching the capacitor configuration, and to interrupt switching of the capacitor configuration to permit an output voltage of the switched-capacitor voltage regulator to fall below the scaled output voltage but to remain above a lower limit of the desired output voltage range to save power by reducing losses due to the switching.

Techniques for switch capacitor regulator power savings

A line driver circuit is configured to provide a high spurious free dynamic range output and includes first and second output transistors and a control circuit. The first output transistor is controllable to pull an output node to a logic high state, and the second output transistor is controllable to pull the output node to a logic low state. The first control circuit is connected to a control input of the first output transistor and configured to establish a control signal at the control input of the first output transistor while the second output transistor is in a low impedance operating state to reduce an imbalance in turn-on delay between the first output transistor and the second output transistor.

High spurious-free dynamic-range line driver

A power management unit comprises a controller, an oscillator circuit, and a monitoring circuit. The controller is configured to control operation of a power converter circuit in a low power mode and an active mode. The oscillator circuit is configured to generate clock signals in the low power mode to control the operation of the power converter circuit. The monitoring is circuit configured when in the low power mode to receive a regulated output voltage from the power converter circuit, compare the regulated output voltage to a specified voltage threshold, and turn off the oscillator circuit when the regulated output voltage is greater than the specified threshold voltage and turn on the oscillator circuit when the regulated output voltage is less than the specified threshold voltage.

Supply voltage apparatus with integrated gain adjustment and multiple supply monitoring

A power gating circuit includes a first transistor to couple a power supply to a gated power rail after receiving a control signal. The power gating circuit also includes two or more transistors coupled in parallel with the first switch, the one or more transistors configured to sequentially couple the power supply to the gated power rail according to a sequence determined by a comparator circuit and one or more cascaded latches.

Wake-up control circuit for power-gated integrated circuits

The objective of this invention is to provide a solid-state image pickup device and its driving method that has a minimum circuit area and a wide dynamic range. The invention includes: a sensor array SA; a memory M; and a signal determination circuit DC. The sensor array has plural pixels in an array integrated on a semiconductor substrate. Each pixel sequentially outputs a first signal and a second signal. The memory M is connected to each column of pixels array and stores the first signal or the second signal. The signal determination circuit DC outputs signal (SS) such that it works as follows: when the first signal is input to memory M from the pixel, the signal determination circuit DC determines whether the first signal can be used. If so, the first signal is selected and the second signal is discarded and is not output to memory M. When the second signal is selected, the second signal is uploaded to memory M.

Solid state image pickup device and driving method therefore selecting a first signal or a sequentally output second signal for each pixel

Embodiments of the present invention may provide a power supply system that uses a capacitive voltage divider to selectively monitor various power supplies on an IC chip. The power supply system may sample a monitored power supply to a capacitor and select certain capacitors from a set of switched capacitors to divide down the sampled voltage. The resulting voltage may be compared to a voltage reference. Using different selections of switched capacitors, the monitored power supply may be compared for different voltage levels. The ratio of the sampling capacitor to the selected capacitors may determine a voltage level the comparator will trigger. Further, based on the monitored power supply level, the power supply system may turn on a switch between an external power supply and a regulated digital power supply to charge the regulated digital power supply while a main LDO is turned off.

Ultra-low-power power supply system for an IC chip

This invention is an amplification circuit which limits increased power consumption and circuit surface area use and an imaging device including this amplification circuit. After initially discharging a capacitor, a signal charge corresponding to the difference between pixel signals is transferred repeatedly to the capacitor during an integration phase storing a signal charge proportional to the number of repetitions. The output of amplification is the signal charge accumulated in the capacitor. The gain is independent of the capacitor capacitance ratio. Thus the capacitor size can be smaller than conventional amplification circuits.

Amplifying circuit and imaging device imaging device

Embodiments of the present invention may provide a power-gating switch circuit. The power-gating switch circuit may comprise a first switch to connect a power supply to a virtual power supply and a second switch to connect the power supply to the virtual power supply in parallel to the first switch. The first switch may have a higher impedance than the second switch. When a wake up signal is received, the first switch may be turned on first and the second switch may be turned on after the virtual power supply reaches a predetermined voltage level.

Wake-up control circuit for power-gated IC

This invention is an image pickup device that realizes a wide dynamic range while minimizing circuit area using a pixel array that can pick up a low-sensitivity image and a high-sensitivity image. This invention obtains information (S/S) needed for generating a correction coefficient using one more than the number of pixels readout circuits (RCto RCn+1). This significantly reduces the circuit area compared with the case of using twice as many readout circuits as pixels for generating the correction coefficient.

Image pickup device

The objective of this invention is to provide a solid-state imaging device and drive method with which sampling before the output values from pixels have reached a constant value can be avoided. The solid-state imaging device comprises photosensitive pixels arranged in the form of an array on a photosensitive surface and that have a photodiode that generates and stores a photocharge, a transfer transistor that transfers the photocharge, a floating diffusion to which the photocharge is transferred, and an amplifying transistor that converts the photocharge into a voltage signal and that amplifies the signal; photosensitive-surface output line connected to the source/drain of one of the amplifying transistors; power source connected thereto; sampling circuit connected to the photosensitive-surface output line; and current source regulating circuit, which regulates the current source current, connected to the current source so that, for sampling of the output values, the sampling circuit samples the output values after the output values have essentially become constant by comparing the output values immediately after they are output to the photosensitive-surface output lines.

Solid-state imaging device

In recent years, the performance of CMOS and CCD image sensors has dramatically improved, and to utilize the improved performance of these sensors, processing circuitry is provided here. This processing circuitry employs a adjustable gain that varies depending on the intensity of the signal from the image sensor so as to reduce noise, reduce area used, and reduce power consumption.

Imaging apparatus and method

This invention improves linearity of a solid-state image pickup device beyond that of the prior art source follower to improve image quality. The image pickup device has plural pixels disposed in an array. Each pixel includes: a photodiode (PD); a transfer transistor (Tr); a floating diffusion (FD); and an amplification transistor (Tr). A compensating circuit has an amplifier (AP) receiving the output of the amplification transistor (Tr), and a compensating transistor (M) matched to the pixel amplification transistor (Tr). Compensation is provided using negative feedback in the amplifier (AP).

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Valencia, Spain

Jose Tejada