National Technology & Engineering Solutions of Sandia, LLC

Vidatronic, Inc.

Other

USA As Represented by Secretary of the Navy

Jose Silva-Martinez

Christopher T Rodenbeck

John Mincey

John Tabler

Aydin I Karsilayan

He Hu

Moises Emanuel Robinson

Mauricio Zavaleta

Junning Jiang

Eric Su

Systems, devices, and methods are provided for mixed-mode signal processing that achieves unprecedented levels of out-of-band and in-band interference suppression. Embodiments of the present disclosure mitigate the effects of blockers and jammers, which have surfaced as issues in emerging cognitive radio systems as those networks struggle to co-exist with licensed and unlicensed users.

Blocker-resilient broadband wireless transceivers with multi-user collision tolerance based on mixed-mode correlation

An apparatus and methods for timing mismatch in a power amplifier includes a segmented PA with two-path timing mismatch calibration to improve ACLR performance over different signal transitions, process, voltage and temperature (PVT) variations and device aging; a fast and efficient algorithm for measuring and calibrating the delay of two paths (signal path and control path); a signal magnitude variation detection circuit, such as flash ADC, with improved comparator's performance for RF signal processing and minimum delay. A method for choosing the threshold voltage of the magnitude variation detection circuit, according to status of the signals and orthogonal frequency-division multiplexing (OFDM) related standards; other critical blocks.

Methods and apparatus for online timing mismatch calibration for polar and segmented power amplifiers

A silicon based (e.g., SiGe, CMOS, or BiCMOS) transmitter includes an algorithm that strategically segment and pre-distort the input signal according to its power; a reconfigurable power amplifier (PA) having a plurality of PA sections, wherein the plurality of PA sections comprise discrete weighted transistor arrays that are digitally turned OFF or ON according to a magnitude of an input signal; an impedance matching network equipped with a common-mode feedback (CMFB) mechanism configured to reduce common-mode glitches at an output of the PA due to ON/OFF manipulations of the PA segments; and a 1:N transformer, which comprises a capacitive matching engine and a power detector, disposed between the impedance matching network and the reconfigurable linear PA.

Apparatus and methods for power efficient CMOS and BiCMOS transmitters suitable for wireless applications

A variable bandwidth filter is described herein, wherein a bandwidth of a passband of the variable bandwidth filter is dynamically tunable. The variable bandwidth tuner is implemented on a CMOS chip, and acts to filter analog signals. The variable bandwidth filter comprises a plurality of finite impulse response (FIR) filters, wherein each FIR filter comprises a plurality of tunable transconductors. The tunable transconductors are tunable in their gain.

Variable bandwidth filter

Described herein is a power-efficient Gm-C filter, wherein the Gm-C filter includes several operational transconductance amplifiers (OTAs). In an example, at least two of the OTAs share a common bias current. Further, output of one of the OTAs is used to bias another one of the OTAs. Also described herein is a power-efficient clock generator circuit that is configured to output non-overlapping clock signals. The clock generator circuit includes a ring oscillator circuit, which includes several inverter stages. The clock generator circuit is well-suited for controlling operation of switches.

Gm-C filter and multi-phase clock circuit

Described herein are various technologies relating to processing a coherent signal. A receiver is configured to receive an analog signal, and process the analog signal to generate an input analog signal. The input analog signal has been modulated according to a suitable modulation sequence. A coherent signal sampler coherently samples the modulation sequence, and the result of such sampling is in turn used to demodulate the input analog signal. The resultant signal is then passed to a sigma delta modulator, where it is converted to digital form.

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College Station, TX, United States of America

Jose Silva-Martinez