Intel Corporation

Jose Pedro Diogo Faisca Moreira

Harald Pretl

Stephan Leuschner

Patrick Ossmann

Joerg Fuhrmann

A digital-to-analog converter circuit including one or more digital-to-analog converter cells and a separate voltage protection circuit connected by a common output node. A first digital-to-analog converter cell includes a first transistor which is configured to be switched to a conductive state when the first digital-to-analog converter cell is activated. A first terminal of the first transistor is coupled to a defined potential, wherein a second terminal of the first transistor is coupled to a common output node of the one or more digital-to-analog converter cells. The digital-to-analog converter circuit further includes a voltage protection circuit coupled between the common output node of the one or more digital-to-analog converter cells and an output node of the digital-to-analog converter circuit to regulate a voltage between the common output node and the defined potential.

Digital-to-analog converter circuit, a method for operating the same, an apparatus and a method for controlling a digital-to-analog converter cell

A communication matching network for multi-harmonic suppression includes a communication circuit configured to provide a signal. The communication matching network further includes a matching circuit configured to receive the signal from the communication circuit and suppress one or more harmonics of the received signal to generate a filtered signal, wherein the matching circuit includes a transformer comprising a first winding and a second winding, wherein the first winding includes a first inductance and the second winding includes a second inductance and wherein the matching network includes a harmonic trap including a third inductance such that the third inductance is located inside or within a physical layout of the first winding and/or the second winding. The communication matching network further includes a receiver circuit configured to receive the filtered signal from the matching circuit for further processing.

Growing community of inventors

Munich, Germany

Jose Pedro Diogo Faisca Moreira