Intel Deutschland Gmbh

Qualcomm Incorporated

Intel Mobile Communications Gmbh

Qualcomm Technologies, Inc.

Rf360 Europe Gmbh

José Moreira

Stephan Leuschner

Peter Pfann

Markus Valtere

Florian Mrugalla

Jeroen Bielen

Alberto Jose Teixeira De Queiros

Juergen Portmann

Bart Kassteen

Disclosed are apparatuses and methods for fabricating the apparatuses. In one aspect, an apparatus includes a high-power die mounted on a backside of a package substrate. A heat transfer layer is disposed on the backside of the high-power die. A plurality of heat sink interconnects is coupled to the heat transfer layer. The plurality of heat sink interconnects is located adjacent the high-power die in a horizontal direction.

High-power die heat sink

Disclosed are apparatuses and methods for fabricating the apparatuses. In one aspect, an apparatus includes a high-power die mounted on a backside of a package substrate. A heat transfer layer is disposed on the backside of the high-power die. A plurality of heat sink interconnects is coupled to the heat transfer layer, where each of the plurality of heat sink interconnects is directly coupled to the heat transfer layer in a vertical orientation.

High-power die heat sink with vertical heat path

A transformer is provided. The transformer includes at least one first primary turn; at least one second primary turn; and a first secondary turn and a second secondary turn. The first secondary turn and the second secondary turn are arranged laterally between the at least one first primary turn and the at least one second primary turn. The first secondary turn and the second secondary turn are arranged one above the other.

Transformer and electrical circuit

A differential amplifier stage may include: a first transistor having a gate terminal; a second transistor having a gate terminal; and a voltage limiting circuit coupled to the gate terminals of the first and second transistors, wherein the voltage limiting circuit limits a gate voltage supplied to at least one of the gate terminals of the first and second transistors.

Amplifier stage

A transmission arrangement is disclosed having an amplifier which is set up to amplify a transmission signal and to provide it as an amplified transmission signal in differential form, an analysis circuit for determining a property of the amplified transmission signal, and a differential feedback path which is set up to supply the amplified transmission signal to the analysis circuit in differential form.

Transmission arrangement and method for analyzing an amplified transmission signal

A power amplifier system includes a transistor stack and an upper portion. The upper portion includes an LC tank. The LC tank is configured to generate selected harmonics to mitigate voltage stress and facilitate amplifier efficiency. The transistor stack includes serial connected input transistors and upper transistors. The input transistors are configured to receive an input signal and the upper transistors are configured to provide an amplifier output signal. The LC tank is configured to provide the selected harmonics to at least gates of the upper transistors.

Growing community of inventors

Munich, Germany

José Moreira