Cadence Design Systems, Inc.

University of Illinois

Silicon Bandwidth, Inc.

Jose Emmanuel Schutt-Aine

Jilin Tan

Feras Al-Hawari

Stanford W Crane, Jr

Ping Liu

Chang Po Liu

Charley T Ogata

Myoung-soo Jeon

Dennis Nagle

Ambrish Kant Varma

Zhongyong Zhou

Qi Zhao

Jun Zou

Ton-Yong Wang

Shangli Wu

Andreas C Cangellaris

Yubao Meng

Chidhambarakrishnan Kumar

The present disclosure relates to a computer-implemented method for transient simulation of an input/output buffer model. The method may include generating an input/output buffer data file associated with a first model of an electrical circuit. The method may also include determining at least one of a node voltage and a branch current associated with the electrical circuit using, at least in part, a latency insertion method, the method may further include performing one or more simulations on a second model of an electrical circuit, the one or more simulations incorporating, at least in part, the input/output buffer data file and the latency insertion method.

System, method, and computer program product for input/output buffer modeling

A method and system are provided for adaptively modeling and simulating high speed response of a transmission line. A simulation unit maintains a plurality of curve approximation options for modeling the transmission line. The suitability of a predefined primary one of the curve approximation options for modeling is determined based on frequency-domain modal scattering parameters obtained according to frequency-dependent data characterizing the transmission line. One of the options is selectively executed in response to the determination, in order to generate a macromodel of the transmission line. The primary option is executed upon determination of suitability, while a secondary one of the curve approximation options is alternatively executed upon determination of non-suitability. Transient simulation is then executed upon the resulting macromodel of the transmission line.

Method and system for adaptive modeling and simulation of lossy transmission lines

A method is provided to use a Smith Chart technique to obtain frequency domain network performance information corresponding to a passive network including one or more passive devices comprising: receiving first data representing a first Smith Chart plot of coefficients representing measured mismatch between a source impedance of a network and a load impedance of the network for higher frequency components; and extrapolating a predicted substantially spiral shaped second Smith Chart plot of coefficients based upon the first data, which includes a coefficient representing predicted mismatch between the source impedance of the network and the load impedance of the network for lower frequency components.

Use of smith chart to compensate for missing data on network performance at lower frequency

A raised on-chip planar inductor. An inductor is fabricated on a substrate. The inductor, except for an anchoring extremity, is lifted from the substrate, preferably by application of a magnetic field to a magnetic layer formed on the inductor. The lifting of the inductor deforms a plastic bending region. After the magnetic field is removed, the inductor remains raised with respect to the substrate.

Raised on-chip inductor and method of manufacturing same

A cluster grid array semiconductor die package and mating socket provide electrical connection between one or more semiconductor dies housed within the die package and substrate, such as a printed circuit board, on which the mating socket is mounted. The die package and the mating socket may be easily connected and disconnected. The die package may include power and ground planes built into and distributed within the housing of the die package.

Semiconductor die package having mesh power and ground planes

Growing community of inventors

Urbana, IL, United States of America

Jose Emmanuel Schutt-Aine