International Business Machines Corporation

Advanced Micro Devices Corporation

Globalfoundries Inc.

Jophy Stephen Koshy

Abhishek Dube

Kevin K Chan

Judson Robert Holt

Jeffrey Bowman Johnson

Brian Joseph Greene

Dae-Gyu Park

Viorel C Ontalus

Thomas Safron Kanarsky

Steven Ware Jones

Frank Bin Yang

Kevin McStay

Johan W Weijtmans

Desmond J Donegan, Jr

A method of forming transistors with close proximity stressors to channel regions of the transistors is provided. The method includes forming a first transistor, in a first region of a substrate, having a gate stack on top of the first region of the substrate and a set of spacers adjacent to sidewalls of the gate stack, the first region including a source and drain region of the first transistor; forming a second transistor, in a second region of the substrate, having a gate stack on top of the second region of the substrate and a set of spacers adjacent to sidewalls of the gate stack, the second region including a source and drain region of the second transistor; covering the first transistor with a photo-resist mask without covering the second transistor; creating recesses in the source and drain regions of the second transistor; and forming stressors in the recesses.

Forming CMOS with close proximity stressors

A method for forming a conformal buffer layer of uniform thickness and a resulting semiconductor structure are disclosed. The conformal buffer layer is used to protect highly-doped extension regions during formation of an epitaxial layer that is used for inducing mechanical stress on the channel region of transistors.

Method for growing conformal EPI layers and structure thereof

Method for growing conformal epi layers and structure thereof

A semiconductor device and a method of making the device are provided. The method can include forming a gate conductor overlying a major surface of a monocrystalline semiconductor region and forming first spacers on exposed walls of the gate conductor. Using the gate conductor and the first spacers as a mask, at least extension regions are implanted in the semiconductor region and dummy spacers are formed extending outward from the first spacers. Using the dummy spacers as a mask, the semiconductor region is etched to form recesses having at least substantially straight walls extending downward from the major surface to a bottom surface, such that a substantial angle is defined between the bottom surface and the walls. Subsequently, the process is continued by epitaxially growing regions of stressed monocrystalline semiconductor material within the recesses. Then the dummy spacers are removed and the transistor can be completed by forming source/drain regions of the transistor that are at least partially disposed in the stressed semiconductor material regions.

Transistor having V-shaped embedded stressor

Growing community of inventors

Wappingers Falls, NY, United States of America

Jophy Stephen Koshy