Samsung Electronics Co., Ltd.

Joonyoung Choi

Taesung Kim

Jiyoung Kim

Dongsoo Woo

Junsoo Kim

Sam-jong Choi

Namho Jeon

Kyoochul Cho

Yeonsook Kim

Tae-Hyoung Koo

Heesung Kim

An integrated circuit device includes a substrate having an active area therein, a bit line on the substrate, and a direct contact, which extends between the active area and the bit line and electrically couples the bit line to a portion of the active area. A spacer structure is also provided, which extends on sidewalls of the bit line and on sidewalls of the direct contact. A field passivation layer is provided, which extends between the sidewalls of the direct contact and the spacer structure. The spacer structure and the field passivation layer may include different materials, and the field passivation layer may directly contact the sidewalls of the direct contact. The field passivation layer can include nonstoichiometric silicon oxide SiO, where 0.04≤x≤0.4, and may have a thickness of less than about 25 Å.

Integrated circuit devices and methods of manufacturing the same

A fabrication method of an integrated circuit semiconductor device includes: forming a plurality of low dielectric pattern apart from each other on a substrate, the plurality of low dielectric pattern having a lower dielectric constant than the substrate; after forming the low dielectric pattern, forming a flow layer to bury the low dielectric pattern on the substrate; forming an epitaxial layer on the flow layer; and forming a transistor in the substrate comprising the low dielectric pattern buried by the flow layer and in the epitaxial layer.

Fabrication method of integrated circuit semiconductor device

A method of processing a semiconductor wafer includes preheating the wafer to a preheating temperature that is less than a peak temperature, heating the wafer from the preheating temperature to the peak temperature at a first ramp rate that averages about 100&#xb0; C. per second or more, and, immediately after heating the wafer from the preheating temperature to the peak temperature, cooling the wafer at a second ramp rate that averages about &#x2212;70&#xb0; C. per second or more from the peak temperature to the preheating temperature, wherein the peak temperature is about 1,100&#xb0; C. or more.

Semiconductor wafer, semiconductor device using the same, and method and apparatus for producing the same

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Suwon-si, South Korea

Joonyoung Choi