Korea Institute of Science and Technology

Seoul National University

Joonyeon Chang

Ki Young Lee

Hyunjung Yi

Jin-Dong Song

Chaun Jang

Hyun Woo Koo

Hyung-jun Kim

Suk Hee Han

Jae Hyun Kim

Won Jun Choi

Jaewook Kim

Jungyeob Ham

Sang Kyung Kim

Pilju Choi

Young Tae Park

Joon Young Kwak

Ki Young Choi

Hyunsu Ju

Won Young Choi

Taejung Kim

Gyosub Lee

Soomi Ju

Sang Hoon Shin

Ju-Young Lim

Chae Un Lee

According to an aspect of the disclosure, there is provided a microwave reactor including a container for storing a bath fluid, a tube including an inlet at one end through which a target fluid is introduced, an outlet at another end through which the target fluid is discharged, wherein at least a portion of the tube is submerged in the bath fluid, and at least one radiator located outside the container and configured to irradiate microwaves into the container.

Microwave reactor

An embodiment of the present disclosure discloses a method of process variation compensating through activation value adjustment of an analog binarized neural network circuit that may recover a decrease in recognition rate performance up to an almost perfect level, even if a binarized neural network is implemented as an analog circuit such that recognition rate performance is decreased due to process variation.

Method for compensating for process variation by means of activation value adjustment in analog binarized neural network circuit, and system therefor

Provided is a Group III-V compound semiconductor device. The device includes a substrate, a compound semiconductor layer provided on the substrate; and a buffer layer interposed between the compound semiconductor layer and the substrate. The compound semiconductor layer includes a first semiconductor area having a first conductivity type and a second semiconductor area having a second conductivity type. The buffer layer includes a high electron density area. In the buffer layer, an electron density of the high electron density area is higher than an electron density outside the high electron density area.

Group III-V compound semiconductor device

Provided is a peptide including XSXAAXXP (SEQ ID NO. 1), XXPXXAXP (SEQ ID NO. 2), SXAAXXP (SEQ ID NO. 3), or XPXXAXP (SEQ ID NO. 4), which bind to graphitic materials or volatile organic compounds.

Peptide selectively binding to graphitic materials and volatile organic compounds

Provided is an electronic sheet including a graphitic material and a phage which displays a peptide having a binding ability to the graphitic material on its coat protein or a fragment thereof.

Hybrid electronic sheets

A spin transistor includes: an input part that is made of a material exhibiting a spin Hall effect and configured to transfer electrons with a predetermined direction of spin to a connecting part; and the connecting part that receives the electrons with the predetermined direction of spin from the input part, rotates the spin of the electrons in accordance with a gate voltage applied to the gate electrode, and transfers the electrons to the output part.

Ferromagnet-free spin transistor and method for operating the same

In accordance with the present disclosure, a hybrid electronic sheet which exhibits superior electrical property and allows biomaterial functionalization and flexible device patterning may be provided by binding a graphitic material in colloidal state to a biomaterial capable of binding thereto specifically and nondestructively. Since the electronic sheet is an electronic sheet wherein a biomaterial and an electrical material (graphitic material) are hybridized, it exhibits good compatibility with biomaterials and can be further functionalized with, for example, an enzyme that selectively reacts with a biochemical substance. Accordingly, an electrical material and a chemical or biological material may be effectively nanostructurized and it can be realized as a multi-functional, high-performance electronic sheet.

Disclosed herein are a method of generating a two-dimensional hole gas (2DHG) using a type-2 quantum well formed using semiconductors with different electron affinities or band gap, and a high-speed p-type semiconductor device using the 2DHG. To this end, the method includes providing a semiconductor substrate; growing a first semiconductor layer on the semiconductor substrate, growing a second semiconductor layer with a different electron affinity or band gap from the first semiconductor layer on the first semiconductor layer, and growing a third semiconductor layer with a different electron affinity or band gap from the second semiconductor layer, thereby forming a type-2 quantum well; and forming a p-type doping layer in the vicinity of the type-2 quantum well, thereby generating the 2DHG.

P-type semiconductor device comprising type-2 quantum well and fabrication method thereof

Disclosed is a method of manufacturing a semiconductor device whereby InAsSbsemiconductor layer is formed on an easily available and economical semiconductor substrate such as a GaAs substrate or a Si substrate. According to the method, a quantum dot layer is formed between a semiconductor substrate and a semiconductor layer to reduce defects caused by lattice mismatch between the semiconductor layer and the semiconductor layer. The method may improve the growth speed of the semiconductor layer. In addition, because the InSb layer provided by the present invention has an electron mobility greater at room temperature, it may improve the quality and productivity of the semiconductor device.

Growing community of inventors

Seoul, South Korea

Joonyeon Chang