Texas Instruments Corporation

Qualcomm Incorporated

Joonhoi Hur

Lei Ding

Rahmi Hezar

Baher S Haroun

Paul J Draxler

Nathan Richard Schemm

Aritra Banerjee

Jeremy Darren Dunworth

Marco Cassia

Peter David Heidmann

Calogero Davide Presti

Paul Joseph Draxler

An amplifier circuit includes a first adjustable amplification path and a second adjustable amplification path; wherein the first adjustable amplification path and the second adjustable amplification path are configurable in different operating modes selected from a linear operating mode, an efficient operating mode, and an intermediate operating mode to amplify a transmission signal based at least in part on a characteristic of the transmission signal.

Reconfigurable radio frequency (RF) power amplifier circuit

Certain aspects of the present disclosure provide methods and apparatus for amplifying signals with an amplification circuit. The amplification circuit generally includes a first transistor, an input path coupled between an input node of the amplification circuit and a control input of the first transistor, and a feedforward path coupled between the input node and a feedforward node. In certain aspects, the amplification circuit may also include a first resistive device coupled between the feedforward node and the control input of the first transistor, a biasing circuit coupled to the feedforward node, and a low-impedance path coupled to the feedforward node.

Amplifier linearizer with wide bandwidth

An outphasing amplifier includes a first class-E power amplifier having an output coupled to a first conductor and an input receiving a first RF drive signal. A first reactive element is coupled between the first conductor and a second conductor. A second reactive element is coupled between the second conductor and a third conductor. A second class-E power amplifier includes an output coupled to a fourth conductor and an input coupled to a second RF drive signal, a third reactive element coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load. An efficiency enhancement circuit is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits are coupled to the first and fourth conductors, respectively.

Class-E outphasing power amplifier with efficiency and output power enhancement circuits and method

A wideband envelope tracking power amplifier includes a plurality of low dropout voltage regulators (LDOs) including at least a first LDO and a second LDO. The wideband envelope tracking power amplifier also includes a single-input-multi-output (SIMO) voltage supply to output a plurality of voltage signals at different voltage levels, the voltage levels including a highest voltage level and one or more voltage levels lower than the highest voltage level. The SIMO voltage supply connects a first of the plurality of voltage signals at a first voltage level to the first LDO to form at least a portion of an envelope tracking voltage level signal, and connects a second of the plurality of voltage signals at a second voltage level less than or equal to the first voltage level to the second LDO to form at least another portion of the envelope tracking voltage level signal.

Efficient wideband envelope tracking power amplifier

A circuit including a power amplifier having a control terminal configured to control an output level of the power amplifier, a bias circuit in communication with the control terminal, the bias circuit including a tunable plurality of diodes in series configured to supply a bias voltage to the control terminal, and a control circuit in communication with the bias circuit configured to tune the plurality of diodes in series to create the bias voltage in response to a supply voltage of the amplifier.

Systems and methods for linearizing operation of a power amplifier

The present disclosure includes dynamic power divider circuits and methods. In one embodiment, a dynamic power divider includes first and second quarter wave lines that receive an input signal and produce first and second signal on second terminals of the lines. Dynamic power division of the input signal uses a variable impedance circuit between the second terminal of the first quarter wave line and the second terminal of the second quarter wave line. The variable impedance may reduce impedance between two output paths as the input signal power increases or increase impedance between the output paths as the input signal power decreases.

Dynamic power divider circuits and methods

An outphasing amplifier includes a first class-E power amplifier (-) having an output coupled to a first conductor (-) and an input receiving a first RF drive signal (S(t)). A first reactive element (C-) is coupled between the first conductor and a second conductor (-). A second reactive element (L-) is coupled between the second conductor and a third conductor (-). A second class-E power amplifier (-) includes an output coupled to a fourth conductor (-) and an input coupled to a second RF drive signal (S(t)), a third reactive element (C-) coupled between the second and fourth conductors. Outputs of the first and second power amplifiers are combined by the first, second and third reactive elements to produce an output current in a load (R). An efficiency enhancement circuit (L-) is coupled between the first and fourth conductors to improve power efficiency at back-off power levels. Power enhancement circuits (-) are coupled to the first and fourth conductors, respectively.

For generating quantized signals, a quantized phase domain related to quantized phases of an input signal is generated. Vectors that the input signal may occupy are calculated based on the quantized phase domain. A first quantized phase of a first component of the input signal is generated per the quantized phase domain, and a second quantized phase of a second component of the input signal is generated per the quantized phase domain.

Circuits and methods for transmitting signals

The present disclosure includes circuits and methods for power amplifiers. In one embodiment, a main amplifier stage and peaking amplifier stage of a power amplifier receive a modulated supply voltage. The peaking amplifier stage is biased dynamically to adjust the bias of peaking stage to compensate for changes in the power supply voltage. A bias voltage may be increased as the supply voltage on the peaking stage decreases, and the bias voltage may be decreased as the supply voltage on the peaking stage increases. Accordingly, bias characteristics of the peaking stage are maintained across supply voltage variations, and the efficiency of the power amplifier is improved.

Circuits and methods for biasing a power amplifier

Exemplary embodiments are related to a tri-phase digital polar modulator. A device may include a modulator configured to generate a primary phase modulated signal including the most significant bits (MSBs) of a modulated signal, a leading phase modulated signal including a first least significant bits (LSB) of the modulated signal, and a lagging phase modulated signal including a second LSB of the modulated signal. The device may also include a combination unit configured to add the primary phase modulated signal, the leading phase modulated signal, and the lagging phase modulated signal.

Tri-phase digital polar modulator

Embodiments of the present disclosure include a bias circuit for generating bias voltages to stacked transistors. In one embodiment, stacked transistors are coupled between an input transistor and an output node. A modulated power supply voltage and an input signal produce a voltage at the output node. The modulated power supply voltage is provided as an input to the bias circuit. Bias voltages are generated that change with the power supply voltage. In one embodiment, particular transistors in the stack are biased so that their control terminals are effectively short circuited when the power supply voltage is reduced.

Bias circuits and methods for stacked devices

The present disclosure includes circuits and methods for power amplifiers. In one embodiment, a main and peaking amplifier receive dynamic power supply voltages to operate an RF power amplifier in a high efficiency range for a particular output voltage. The power supply voltages may be changed based on an output voltage so that the power amplifier operates within a high efficiency plateau. In one embodiment, different discrete power supply voltage levels are used for different output voltage ranges. In another embodiment, a continuous time varying power supply voltage is provided as the power supply voltage. A dynamic supply voltage may be generated having a lower frequency than a signal path of the power amplifier.

Circuits and methods for power amplification with extended high efficiency

A method of canceling nonlinear distortions in pulse width modulated signals includes receiving an input signal. A first signal that is the modulated input signal is generated. The first signal has quantized levels representing the input signal. A pulse width modulated (PWM) sequence that is representative of the first signal is generated. A second signal that is the PWM sequence mixed with a carrier signal is generated. An error signal is generated in response to the first signal and modeled from the second signal. The error signal is added to the input signal.

Circuits and methods for cancelling nonlinear distortions in pulse width modulated sequences

A method for transmitting radio frequency (RF) signals is provided. In-phase (I) and quadrature (Q) signals are received and filtered using sigma-delta modulation. I and Q pulse width modulation signals are generated from the filtered I and Q signals and interleaved so as to generate a time-interleaved signal. The time-interleaved signal is then amplified to generate the RF signals.

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San Diego, CA, United States of America

Joonhoi Hur