Samsung Electronics Co., Ltd.

Joong-Shik Shin

Byung-Kwan You

Eun-Taek Jung

Kwang-Ho Kim

Hyun-Mog Park

Young-Bae Yoon

Ji-Hwon Lee

Young-soo Song

Chang-Sun Lee

Hyun-Seok Na

A vertical type semiconductor device includes a substrate that has a plurality of trenches, a support pattern that fills the plurality of trenches and protrudes from a top surface of the substrate, a semiconductor layer disposed on the substrate that fills a space between the support patterns, a stacked structure disposed on the support pattern and the semiconductor layer that includes a plurality of insulation layers and a plurality of first conducive patterns that are alternately and repeatedly stacked, and a plurality of channel structures that penetrate through the structure and the semiconductor layer and that extend into the support pattern. Each channel structure includes a channel layer. At least a portion of the channel layer makes contact with the semiconductor layer.

Vertical type semiconductor devices and methods of manufacturing the same

A vertical memory device includes a channel, gate lines, and a cutting pattern, respectively, on a substrate. The channel extends in a first direction substantially perpendicular to an upper surface of the substrate. The gate lines are spaced apart from each other in the first direction. Each of the gate lines surrounds the channel and extends in a second direction substantially parallel to the upper surface of the substrate. The cutting pattern includes a first cutting portion extending in the first direction and cutting the gate lines, and a second cutting portion crossing the first cutting portion and merged with the first cutting portion.

Vertical memory devices and methods of manufacturing the same

Provided is a fabricating method of a nonvolatile memory. The fabricating method includes forming a plurality of gates extending in a first direction on a substrate to be adjacent to each other, forming a gap-fill layer filling at least a portion of a space between the plurality of gates, forming a supporter pattern supporting the plurality of gates on the plurality of gates and the gap-fill layer, and forming an air gap in the space between the plurality of gates by removing the gap-fill layer.

Methods of fabricating nonvolatile memory devices and related devices

Methods of manufacturing NOR-type flash memory device include forming a tunnel oxide layer on a substrate, forming a first conductive layer on the tunnel oxide layer, forming first mask patterns parallel to one another on the first conductive layer in a y direction of the substrate, and selectively removing the first conductive layer and the tunnel oxide layer using the first mask patterns as an etch mask. Thus, first conductive patterns and tunnel oxide patterns are formed, and first trenches are formed to expose the surface of the substrate between the first conductive patterns and the tunnel oxide patterns. A photoresist pattern is formed to open at least one of the first trenches, and impurity ions are implanted using the photoresist pattern as a first ion implantation mask to form an impurity region extending in a y direction of the substrate. The photoresist pattern is removed. The substrate is annealed to diffuse the impurity region, thereby forming an impurity expansion region further expanding in an x direction of the substrate. The substrate is selectively removed using the first mask patterns as an etch mask to form second trenches corresponding to the first trenches. Isolation layers are formed to define active regions in the second trenches.

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Yongin-si, South Korea

Joong-Shik Shin