Hynix Semiconductor Inc.

Skhynix Inc.

Korea Advanced Institute of Science and Technology

Joong Seob Yang

Jun Seop Chung

Jong Min Lee

You Sung Kim

Se Hyun Kim

Eui Jin Kim

Sang Chul Lee

Duck Ju Kim

Hyun Jun Kim

Byeong Gyu Park

Chae Kyu Jang

Jong Hyun Wang

Jaekyun Moon

Sang Sik Kim

Ho Yeon Lee

Jeong Soon Kwak

In Soo Wang

Seong Hun Park

Seok Hwan Choi

Seung Jae Chung

Tae Ho Shin

Seung Han Ryu

Tao Ho Shin

Seung Ho Chang

Jaehyeong No

A data storage device includes a nonvolatile memory apparatus suitable for accessing a target region corresponding to an access command, and a processor suitable for calculating a first hash value corresponding to the target region based on a first hash function, and updating an access count that is indexed by the first hash value.

Data storage device and operating method thereof

A data storage device includes a controller configured to control data to be written in a first page; and a nonvolatile memory device configured to perform a write operation for writing the data, according to whether the first page is written or not, wherein the nonvolatile memory device provides a state information including an overwrite information meaning whether the write operation has caused an overwrite, to the controller.

A data storage device includes a controller configured to update an access request count and an access count corresponding to a target region based on an access request for the target region, and initialize the access count each time the access request count reaches a first threshold, and a nonvolatile memory apparatus including the target region, and configured to access the target region based on a control of the controller.

Access counts for performing data inspection operations in data storage device

A method for estimating channel characteristics of a nonvolatile memory device including a plurality of memory cells includes the steps of: calculating first threshold voltage distributions of the memory cells programmed according to input data, based on the input data and a physical structure of the memory cells; calculating second threshold voltage distributions of the memory cells, based on output data and the physical structure of the memory cells; and analyzing the relation between the first and second threshold voltage distributions, using a mask.

Method for estimating channel characteristics of nonvolatile memory device

A nonvolatile memory device and a method of operating the same. The nonvolatile memory device includes a memory cell array including memory cells for storing data, a temperature sensor and a controller. The temperature sensor outputs a temperature detection signal according to ambient temperatures while changing one or more pieces of reference voltage information, which are previously stored, when data is programmed into the memory cell array. The controller performs a verify operation of the program using a fast verify method and decides the number of steps which are comprised in step-shaped verify voltage pulse of the fast verify method according to the temperature detection signal.

Nonvolatile memory device and method of operating the same

A nonvolatile memory device includes an encoder configured to perform a scramble operation on input data, a digital sum value (DSV) generator configured to generate a DSV indicating a difference between a number of data '0' and a number of data '1' in the input data encoded by the encoder, a main cell unit of a page of a memory cell array, wherein the main cell unit is configured to store the input data encoded by the encoder, a spare cell unit of the page, wherein the spare cell unit is configured to store the DSV generated by the DSV generator, and a read voltage setting unit configured to determine a read voltage for the page by comparing a DSV generated from the stored data of the main cell unit and the stored DSV of the spare cell unit.

A nonvolatile memory device includes a data conversion unit including an encoder and a decoder. The encoder sets data for each of word lines and creates second data to be programmed into a plurality of memory cells by performing a logical operation on the set data and first data input for programming. The decoder creates the first data by performing a logical operation on the second data that is read from the memory cells and the set data.

Nonvolatile memory device and method of operation to program/read data by encoding/decoding using actual data and random data for program/read operation

A non-volatile memory device is disclosed. The non-volatile memory device includes an encoder configured to set random data in a unit of a word line, and generate second data to be programmed in a memory cell by performing logic operation about the random data and first data inputted for program, and a data converting circuit configured to have a decoder for generating the first data by performing logic operation about the second data read from the memory cell and the random data.

Non-volatile memory device and method of operating the same

Program voltages of a non-volatile memory device are controlled variably according to a program/erase operation count. The non-volatile memory device includes a program voltage supply unit for applying a program voltage to a memory cell, a program/erase count storage unit for storing a total program/erase operation count of the non-volatile memory device, a program start voltage storage unit for storing levels of program start voltages to be differently supplied according to the program/erase operation count, and a program voltage controller for controlling the program start voltage according to the program/erase operation count.

A method of operating a packaged flash memory module includes applying a first program or erase command and a first address associated with the first commend to a first flash memory chip of a plurality of flash memory chips that are arranged within the packaged flash memory module; applying a second program or erase command and a second address associated with the second commend to a second flash memory chip of the plurality of flash memory chips that are arranged within the packaged flash memory module, the second command being applied to the second flash memory chip prior to the completion of the first command by the first flash memory chip; and determining whether or not the first flash memory chip has completed the first command.

Growing community of inventors

Gyeonggi-do, South Korea

Joong Seob Yang