Samsung Electronics Co., Ltd.

Samsung Mobile Display Co., Ltd.

Samsung Display Co., Ltd.

Samsung Sdi Co., Inc.

Lg Semicon Co., Ltd.

Hyundai Motor Company

Kia Motors Corporation

Sqand Co. Ltd.

Joon-Young Park

Yoon-Joo Eom

Junghwan Choi

Won Young Lee

Yongcheol Bae

Joosun Choi

Seongjin Jang

Jang-hyuk Kwon

Seung-Jun Bae

Il-Han Park

Bong-Soon Lim

June-Hong Park

Jae-Jung Kim

Dae-Sik Moon

Chang-Yeon Yu

Joo-Yong Park

Kui-Han Ko

Won-Kyu Kwak

Jong-Hyun Choi

Eun-Ah Kim

Jong-woo Lee

Sun-Won Kang

Minsu Ahn

Ki-Seok Oh

Seungjun Bae

Woogeun Rhee

Jeong-Yeol Lee

Zhihua Wang

Tae-Seung Kim

Hwan Oh Kim

Jong-Woo Lee

Kyoung-Wook Min

Hyo-Soon Kang

Yang-Hann Kim

Min-Su Ahn

Yong-cheol Bae

Tae-Young Yoon

Xueyi Yu

Yong-Gwon Jeong

Doo-Hee Hwang

Hui-Un Son

Jong-Hwa Lee

Sung-Bae Jeon

Sung-Deok Kim

Jin-Kyeom Cho

Yong-Hun Ahn

Jea-Mun Lee

Wan-Jung Kim

To program in a nonvolatile memory device including a cell region including first metal pads and a peripheral region including second metal pads and vertically connected to the cell region by the first metal pads and the second metal pads, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.

Nonvolatile memory device with intermediate switching transistors and programming method

A vehicle audio video navigation (AVN) system may be provided that includes: a plurality of source providers which receives a sound source; a user operation unit which selects at least one of a plurality of the sound sources input from the plurality of the source providers and selects a focusing zone of the sound source; a processor which generates a sound source signal for focusing an output of the selected sound source on the focusing zone; and a multi-channel amplifier which outputs the sound source signal. As a result, the focusing zone of each sound output within a vehicle can be individually controlled. Particularly, the focusing zone of each sound can be easily selected and controlled without changing the location of the speaker within the vehicle. Also, the sound source and the focusing zone within the vehicle can be selected and controlled only by adding an external processor without replacing the AVN device provided in the vehicle.

Method for controlling sound inside vehicle and vehicle AVN system

An operation method of a semiconductor device is disclosed. The semiconductor device includes separate first and second dies in a package and receives first types of signals through first and second respective channels independent of each other and corresponding to the first and second respective dies. The method includes a step in which when information for controlling internal operations of the first and second dies is first applied to the first die through a first pad, the first die performs the internal operation and also transmits the information to the second die through an internal interface connecting the first die and the second die, and a step in which when the information is transmitted to the second die, the second die performs the internal operation.

Multi channel semiconductor device having multi dies and operation method thereof

To program in a nonvolatile memory device, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.

An engine clutch control apparatus of a vehicle including a transmission without a R-shift stage gear may include an engine clutch, a controller which determines whether an engine reverse rotation entry is possible for driving in reverse according to a failure diagnosis information of the engine clutch and executes a reverse rotation driving control according to the determination result, and a drive motor for reversely rotating the transmission according the reverse rotation driving control. The controller in the engine clutch control apparatus includes an engine reverse rotation entry possibility determining module and an engine exhaust gas forced discharge control module.

Apparatus and method for controlling engine clutch

A multi channel semiconductor device is disclosed. The multi channel device may include a substrate, a first die on the substrate and having a first channel to function as a first chip; and a second die on the substrate and having a second channel different from the first channel to function as a second chip and including the same storage capacity and physical size as the first die. An internal interface is disposed between the first and second dies. The internal interface is configured to transmit information for controlling internal operations of the first and second dies and first applied to a first recipient die of the first and second dies to the other die.

A multi channel semiconductor device may include a substrate, a first die on the substrate and having a first channel to function as a first chip; and a second die on the substrate and having a second channel different from the first channel to function as a second chip and including the same storage capacity and physical size as the first die. An internal interface is disposed between the first and second dies. The internal interface is configured to transmit information for controlling internal operations of the first and second dies and first applied to a first recipient die of the first and second dies to the other die.

A buffer circuit includes a first differential amplifier, second differential amplifier, third differential amplifier, and mixer. The first differential amplifier generates a positive differential signal and a negative differential signal based on an input signal and a reference voltage signal. The second differential amplifier generates a first signal based on the positive differential signal and the negative differential signal. The third differential amplifier generates a second signal having a different phase from the first signal based on the positive differential signal and the negative differential signal. The mixer outputs a signal, generated by mixing the first signal and the second signal, as an output signal.

Buffer circuit robust to variation of reference voltage signal

An output circuit includes first and second output drivers. The first output driver is configured to transfer a first data signal directly to an output pad in synchronization with a clock signal. The second output driver is configured to transfer a second data signal directly to the output pad in synchronization with an inversion clock signal. The clock signal and the inversion clock enable multiplexing of the first data signal and the second data signal to provide a multiplexed output data signal.

Output circuit for implementing high speed data transmition

A printed circuit board (PCB) includes a base substrate including upper and lower surfaces, a plurality of solder ball pads separately formed on the lower surface of the base substrate in a radial direction and forming one or more radial pad groups, a plurality of first traces respectively connected to the plurality of solder ball pads and extending to an inside of the radial pad group, and a plurality of second traces respectively connected to the plurality of first traces and extending to an outside of the radial pad group.

Printed circuit board having traces and ball grid array package including the same

An input data alignment circuit includes a data sampler, a frequency divider, a polarity determination block, and a data alignment block. The data sampler provides a data sequence based on data serially input according to a data strobe signal. The frequency divider generates a data alignment signal based on a divided frequency of the data strobe signal. The polarity determination block determines a polarity of the data alignment signal and provides a control signal based on the determined polarity. The data alignment block aligns the data sequence in parallel according to data alignment signal and control signal and generates output data.

Input data alignment circuit and semiconductor device including the same

An ODT circuit is activated/deactivated in response to a latency control signal or a clock enable signal. The ODT circuit includes an ODT control circuit and an ODT section. The ODT control circuit determines an ODT status based on a read latency control signal (RL) and/or a write latency control signal (WL) to generate an ODT control signal. The ODT section is activated/deactivated in response to the ODT control signal.

On-die termination circuit, semiconductor memory device and memory system

A pixel circuit of an organic light emitting diode (OLED) display device is provided, which supplies a small current to an organic light emitting diode during stoppage of a display operation. The pixel circuit includes a second driving transistor, which is coupled in parallel with a first driving transistor. A gate control line is used to control the second driving transistor so that a small current can flow into the organic light emitting diode during the stoppage of the display operation. The small current is supplied through the second driving transistor to the organic light emitting diode during the stoppage of the display operation. Thus, the pixel circuit of the OLED display device can reduce or prevent an electric shock applied to the organic light emitting diode at the beginning of the display operation, thereby reducing or preventing deterioration of the characteristics of the organic light emitting diode.

Pixel circuit and organic light emitting diode display device using the same

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Seoul, South Korea

Joon-Young Park