Samsung Electronics Co., Ltd.

Joon-hyock Choi

Sang-Woo Lee

Byeung-leul Lee

Jong-pal Kim

Yong-chul Cho

Won-youl Choi

Kyu-dong Jung

Taek-ryong Chung

A small structure which uses bonding wires to prevent disturbance and provide support and a method of fabricating the same are provided. The small structure includes a floating body having a plurality of first contact pads, a base having a plurality of second contact pads, and a plurality of bonding wires electrically connecting the first and second contact pads and elastically supporting the floating body. The method of fabricating the small structure includes preparing a base, forming a sacrificial layer on the base, disposing a floating body on the sacrificial layer, connecting the base and the floating body with bonding wires, and removing the sacrificial layer. Thereby, fabrication costs of the small structure are reduced.

Small structure and method for fabricating the same

A vertical offset structure and a method for fabricating the same. The vertical offset structure includes a substrate; a fixed electrode fixing portion formed on the substrate; a fixed electrode moving portion formed at a position away from an upper portion of the substrate by a predetermined distance; a spring portion for connecting the fixed electrode fixing portion and the fixed electrode moving portion to each other so that the fixed electrode moving portion moves into a direction substantially perpendicular to a plate surface of the substrate; a movable electrode located away from the upper portion of the substrate by a predetermined distance to have a predetermined interval horizontal to the fixed electrode moving portion; and a cap wafer bonded to a predetermined area of one of the fixed electrode moving portion and the movable electrode.

Vertical offset structure and method for fabricating the same

A method of reducing notching during reactive ion etching (RIE) is provided. The method is useful when RIE is performed to pass through a silicon layer on a multi-layered structure on which the silicon layer, an insulating layer and a silicon substrate are sequentially deposited. The method includes the steps of: forming an insulating layer on a silicon substrate; forming trenches on the insulating layer to expose the silicon substrate; forming a silicon layer on the insulating layer to fill the trenches; and patterning the silicon layer to form first etch regions, which pass through the silicon layer, to include the trenches. According to the method, it is possible to remarkably reduce notching without depositing a metal layer, when a multi-layered structure including a silicon layer which is etched to be passed through during RIE is fabricated.

Method of reducing notching during reactive ion etching

Growing community of inventors

Seoul, South Korea

Joon-hyock Choi