Samsung Electronics Co., Ltd.

Lg Display Co., Ltd.

Ls Cable Ltd.

Ls Cable & System Ltd.

Joon-Hee Lee

Ju-han Lee

Jun-hae Choi

Seung-gi Chang

In-hwan Kim

Young-Jin Jung

Ho-jeong You

Dong-Won Park

Jong-Ho Park

Ji-hoon Kim

Jong-Won Choi

Yong-Chul Kwon

Jung-Dal Choi

Sung-Hun Lee

Jong-Sun Sel

Hyun-Suk Kim

Sung-Jun Lee

Sang-Wook Han

Jong-Min Park

Hee-Jueng Lee

Hwa-Kyung Shin

Jang-Hwan Kim

Yong-Seok Kim

Jae-Hoon Jang

Jae-Duk Lee

Jung-dal Choi

Seong-Soon Cho

Young-Taek Lee

Dong-seog Eun

Kee-jeong Rho

Young-Gun Pu

Seong-Min Jo

Seok-Jung Yun

Sung-Yun Lee

Sok-Won Lee

Jaehyuk Jang

Chang-Hyun Lee

Chang-Yeul Kwon

Jeong-Ho Lee

Seung-Ho Jang

Sung-Hoi Hur

Seok-Won Lee

Jung-Woo Kim

Thomas Byunghak Cho

Jong-Won Kim

Seung-seop Shim

Hong-soo Kim

Seung-Pyo Hong

Heung-bae Lee

Hyun-ah Sung

Sang-wook Han

Dae-youp Lee

Jong-won Kim

Si-Bum Jun

Ju-Ho Son

Jin-hyun Shin

Yun-seong Eo

Won-Jin Kim

Noh-byung Park

Hee-Jung Hong

Sung-jae Jung

Yoo-cheol Shin

Kwy-ro Lee

In-yup Kang

Joon-hyuk Ryu

Hee-joo Choi

Jae-Sun Yun

Sang-youn Jo

Dong-Woo Lee

Sung-Bok Lee

Ki-Hong Park

Yi-Ju Roh

Seong-soo Kim

Chul-ho Kim

Jin-Yeon Won

Jin-Yong Oh

Seung-ho Jang

Byung-Hak Cho

Seung-Woo Paek

Su-in Baek

Kyu-don Choi

In-su Choi

Il-guy Jung

Il-ku Nam

Hyung-Sam Choi

Bo-Kyung Kim

Dong-Jin Seo

Jae-Geon Lee

Hyun-Tae Gill

Sun-Joo Park

A vertical type semiconductor device includes insulation patterns on a substrate and spaced apart from each other in a first direction perpendicular to a top surface of the substrate, a channel structure on the substrate and penetrating through the insulation patterns, a first conductive pattern partially filling a gap between the insulation patterns adjacent to each other in the first direction and the channel structure and having a slit in a surface thereof, the slit extending in a direction parallel with the top surface of the substrate, and a second conductive pattern on the first conductive pattern in the gap and filling the slit.

Vertical type semiconductor devices and methods of manufacturing the same

In an operating method of a radio frequency integrated circuit (RFIC) including a transmission circuit and a reception circuit, the operating method includes receiving, from a modem, first information for setting transmission power of the transmission circuit or second information about a blocker which is a frequency signal unused by the RFIC, obtaining an allowable value of phase noise of a local oscillator included in the transmission circuit, using the first information, obtaining an allowable value of phase noise of a local oscillator included in the reception circuit, using the second information, determining a level of a driving voltage, using the obtained allowable values of the phase noises, and providing the driving voltage to the local oscillators.

Radio frequency integrated circuit including a local oscillator and operating method thereof

An OLED display device capable of simplifying the configuration of an external compensation circuit and reducing a compensation time is disclosed. The OLED display device includes a display panel including a pixel, a feedback compensator circuit connected to the pixel through a data line and a sensing line of the display panel, the feedback compensator circuit including an error amplifier configured to receive, through a feedback line, a feedback current flowing into the sensing line and a feedback voltage generated by a sensing resistor, from the pixel during a scan period, compare a data input voltage with the feedback voltage to adjust a data output voltage supplied to the pixel through the data line, and set a target current for driving an OLED element in the pixel, and a precharger configured to precharge the feedback compensator circuit at a front part of the scan period.

Organic light-emitting diode display device

Provided is an integrated circuit device including a plurality of word lines overlapping each other, in a vertical direction, on a substrate, a plurality of channel structures extending in the vertical direction through the plurality of word lines on an area of the substrate, a plurality of bit line contact pads on the plurality of channel structures, and a plurality of bit lines, wherein the plurality of bit lines include a plurality of first bit lines extending parallel to each other at a first pitch in a center region of the area, and a plurality of second bit lines extending at a second pitch in an edge region of the area, the second pitch being different from the first pitch.

Integrated circuit devices including a vertical memory device

An organic light-emitting diode (OLED) display can include a display panel including sub-pixels; a deterioration sensing unit configured to sense a deterioration state of the display panel; a power supply configured to output a high voltage for driving the sub-pixels; and a timing controller configured to: receive a deterioration sensing result including information on the deterioration state of the display panel from the deterioration sensing unit, continuously vary the high voltage based on the deterioration sensing result received from the deterioration sensing unit, and provide the varied high voltage to the sub-pixels.

Organic light-emitting diode display and operation method thereof

A memory device includes a memory cell on a first region of a substrate. An active region is in a second region neighboring the first region of the substrate, and an extension direction of the active region has an acute angle with the &#x3c;110&#x3e; direction of the substrate. A transistor serving as a peripheral circuit is on the second region of the substrate. In the memory device, defects or failures due to a crystal defects or a dislocation of the substrate may decrease.

Semiconductor device including different orientations of memory cell array and peripheral circuit transistors

An OLED display device capable of preventing luminance deviation caused by a voltage drop of an EVDD is disclosed. The OLED display device generates a reference voltage, a voltage level of which varies with distance from the data driver and supplies the reference voltage to the display panel through the data driver.

Organic light-emitting display device

Provided is an integrated circuit device including a plurality of word lines overlapping each other, in a vertical direction, on a substrate, a plurality of channel structures extending in the vertical direction through the plurality of word lines on an area of the substrate, a plurality of bit line contact pads on the plurality of channel structures, and a plurality or bit lines, wherein the plurality of bit lines include a plurality of first bit lines extending parallel to each other at a first pitch in a center region of the area, and a plurality of second bit lines extending at a second pitch in an edge region of the area, the second pitch being different from the first pitch.

A display device performs efficient driving by selectively scanning a peripheral area processed to have low resolution. The display device includes a gate driver that scans a first subset of pixel rows in a first scan block including only the peripheral area during a first frame and a second frame, and respectively scan during the first frame and the second frame a second subset of pixel rows and a third subset of pixel rows in a second scan block including the medial area and the peripheral area excluding the foveal area, and scan pixel rows of pixels in a third scan block including the foveal area, the medial area, and the peripheral area during the first frame and the second frame.

Virtual reality display device and method of driving the same

The present disclosure relates to a display interface device which can increase display information transmission efficiency and reduce power consumption and EMI, in which a transmission part transmits clock edge information included in a data packet of each channel at a different timing from clock edge information included in data packets of other channels. A reception part detects a clock edge of each channel from the data packet transmitted through each channel, generates an internal clock signal of each channel, synchronized with the detected clock edge, corrects a delay of each channel depending on a result of a logical operation performed on a delayed clock edge of a channel and a clock edge of another channel to further generate an internal clock signal of each channel, and restores the display information from the data packet of each channel using the internal clock signal of each channel.

Display interface device and data transmission method thereof

A vertical memory device may include a plurality of word lines spaced apart in a first direction, each extending in a second direction perpendicular to the first direction and having a first width in a third direction perpendicular to the first and second directions, a dummy word line over an uppermost word line, including an opening and having a portion thereof with the first width in the third direction, a first string selection line (SSL) and a second string selection line (SSL) over the dummy word line, the first and second SSLs being at substantially the same level along the first direction, each of the first and second SSLs having a second width less than the first width in the third direction, and a plurality of vertical channel structures, each through the word lines, the dummy word line, and one of the first and second SSLs.

Method of manufacturing vertical memory devices

Provided is a vertical non-volatile memory device in which a capacitor constituting a peripheral circuit region is formed as a vertical type so that an area occupied by the capacitor in the entire device can be reduced as compared with a planar capacitor. Thus, a non-volatile memory device may be highly integrated and have a high capacity. The device includes a substrate having a cell region and a peripheral circuit region, a memory cell string including a plurality of vertical memory cells formed in the cell region and channel holes formed to penetrate the vertical memory cells in a first direction vertical to the substrate, an insulating layer formed in the peripheral circuit region on the substrates at substantially the same level as an upper surface of the memory cell string, and a plurality of capacitor electrodes formed on the peripheral circuit region to penetrate at least a portion of the insulating layer in the first direction, the plurality of capacitor electrodes extending parallel to the channel holes. The plurality of capacitor electrodes are spaced apart from one another in a second direction parallel to the substrate, and the insulating layer is interposed between a pair of adjacent capacitor electrodes from among the plurality of capacitor electrodes.

Non-volatile memory devices with vertically integrated capacitor electrodes

Growing community of inventors

Seongnam-si, South Korea

Joon-Hee Lee