Innowireless Co., Ltd.

Joohyeong Lee

Jinsoup Joung

Jongho Lim

Kyeongmin Ha

Ji Hye Shin

Jaehwan Kim

Seungkeun Yook

An apparatus for generating indexes of an interleaver for input data comprises: a main processor for calculating an index for a predetermined bit of the input data; and an index operator for receiving the index calculated by the main processor, calculating in parallel indexes for bits after the predetermined bit, and deriving a plurality of indexes. The main processor calculates the index for ito (i+15)bits of the input data where i is an integer equal to or larger than 0, and transfers a result of (128*f)modK to the index operator. The index operator calculates an index for an (i+j+16)bit where j is an integer which satisfies 0&#x2266;j&#x2266;7 by using an equation of &#x3a0;(i+j+16)=(2*&#x3a0;(i+j+8)&#x2212;&#x3a0;(i+j)+128*f)modK where K is a size of the input data and fis a coefficient calculated from K.

Apparatus and method for generating interleaver index

A turbo encoder apparatus includes: a first element encoder for receiving an input of a bitstream of the data, encoding the input of the bitstream of the data, and generating a first output bitstream in an unit of plural bits; an internal interleaver for generating an interleaved input bitstream from the bitstream of the data; a second element encoder for receiving an input of the interleaved input bitstream in the unit of plural bits, encoding the input of the interleaved input bitstream, and generating a second output bitstream in an unit of plural bits; a trellis-termination-encoder for generating bits for trellis terminations of the first element encoder and the second element encoder; and a bitstream assembler for receiving the first output bitstream, the second output bitstream, and the bits for the trellis terminations and generating an input bitstream for a rate matching.

Turbo encoder apparatus

Disclosed herein is a digital re-sampling apparatus. The digital re-sampling apparatus includes a sample buffer, a sample buffer control unit, a filter bank, a first delay bank, a fractional delay constant table, a combiner bank, and a second delay bank. The sample buffer temporarily stores an input sample in synchronization with an input sampling frequency. The sample buffer control unit controls writing and reading operations. The filter bank includes a number of digital filters equal to the number of stages, and filters the input sample. The first delay bank differentially delays a filter output value. The fractional delay constant table stores information about re-sampling time. The combiner bank includes a number of adders and multipliers, performs an operation, and outputs a re-sampled value. The second delay bank causes a delay so that output of each combiner can be synchronized with each output of the fractional delay constant table.

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Seoul, South Korea

Joohyeong Lee