Samsung Electronics Co., Ltd.

Joohwan Kim

Dohyoung Kim

Hyunjin Park

Junghwan Choi

Jindo Byun

Junyoung Park

Youngdon Choi

Eunseok Shin

Donghee Han

Junho Lee

Gajin Song

Hyunyoon Cho

Jinwook Lee

Younghoon Son

Minsu Jung

Hoseon Shin

Eun Seok Shin

Hyun-Yoon Cho

Youngjin Jeon

Garam Kim

Changhwan YouN

Jaechul Lee

Kyoungdon Jang

Changhwan Youn

Youngsub Ko

Cheol Ryu

Kihyuck Ryu

Seunghyo Chun

A transmitter configured to receive first to N-th data in parallel and sequentially output the first to N-th data in response to first to N-th clock signals having different phases from each other, where N is an integer of at least 2, the transmitter including first to N-th data selectors including a first data selector and a second data selector in correspondence to the first to N-th data, each of the first to N-th data selectors being configured to perform a logical operation on one of the first to N-th data and the first to N-th clock signals and output a plurality of data selection signals, a first pre-driver in correspondence to at least two data selectors among the first to N-th data selectors, the first pre-driver being configured to receive the plurality of data selection signals from the at least two data selectors.

Transmitter, memory device and semiconductor device including the transmitter

Disclosed is a memory device which includes a pull-up driver that is connected between a power supply voltage and a first node, a T-coil circuit that is connected between the first node and a second node, an external resistor, and a ZQ controller that performs a ZQ calibration operation on the pull-up driver. The ZQ controller includes a path selecting circuit that selects one node among the first node and the second node, a comparing circuit that compares a voltage of the one node selected by the path selecting circuit with a pull-up reference voltage and outputs a comparison result, and a code generating circuit that generates a pull-up code for driving the pull-up driver, based on the comparison result. While the pull-up code is generated, the external resistor is connected between the second node and a ground voltage.

Memory device, electronic device, and operation method of memory device

An example electronic device may include a memory configured to store instructions and a processor electrically connected to the memory and configured to execute the instructions. When the instructions are executed by the processor, the processor may be configured to generate a first suggested-utterance list providable to a user and generate a second suggested-utterance list by extracting, from the first suggested-utterance list, utterances capable of successful execution for a device registered to the user, according to state information about the registered device.

Electronic device and method for providing list of suggested utterances

A semiconductor device includes a phase splitter configured to output a plurality of clock signals having different phases by using a plurality of external clock signals having different phases, a plurality of code generators configured to receive a pair of selection clock signals determined from the plurality of clock signals and to output a phase code corresponding to a phase difference error between the pair of selection clock signals, and a delay circuit configured to at least partly simultaneously adjust at least two of a rising edge and a falling edge of each of the plurality of external clock signals with reference to the phase code during a lock time.

Semiconductor device

A transmitter circuit that receives parallel signals and outputs a serial signal in response to the parallel signals may include; a clock generator generating first clock signals having different respective phases, a multiplexer including selection circuits respectively configured to selectively provide at least two of the parallel signals to an output node in response to at least two of the first clock signals, and an output driver generating the serial signal by amplifying a signal at the output node.

Transmitter circuit and method of operating same

A transmitter circuit includes a clock generator configured to generate a plurality of clock signals having different phases, and a plurality of selection circuits configured to receive a plurality of parallel data signals and output a serial data signal on an output node based on the plurality of clock signals and the received plurality of parallel data signals. Each of the plurality of selection circuits includes a data multiplexer configured to generate a plurality of data selection signals based on the received one of the plurality of parallel data signals and the plurality of clock signals; a control signal generator configured to generate first and second control signals based on the plurality of data selection signals; and an output driver connected to the output node, and configured to precharge the output node based on the first control signal or discharge the output node based on the second control signal.

Transmitter circuit including selection circuit, and method of operating the selection circuit

A memory package includes a package substrate including a redistribution layer and bonding pads connected to the redistribution layer, the redistribution layer including a plurality of signal paths; a buffer chip mounted on the package substrate and including a plurality of chip pads corresponding to a plurality of memory channels; and a plurality of memory chips stacked on the package substrate and divided into a plurality of groups corresponding to the plurality of memory channels, wherein memory chips of a first group, among the plurality of memory chips, are connected to first chip pads of the plurality of chip pads through first wires, and wherein memory chips of a second group, among the plurality of memory chips, are connected to second chip pads of the plurality of chip pads through second wires and at least a portion of the plurality of signal paths.

Memory package and storage device including the same

Provided is a task scheduling method. The method may include: assigning a task to one of first processing units functionally connected to an electronic device; and migrating, at least partially on the basis of a performance control condition related to the task, the task to one of second processing units for processing.

Task scheduling based on performance control conditions for multiple processing units

A method for recognizing an image and an apparatus using the same are provided. The method includes receiving image information including a first object and a second object, recognizing position information of the first object indicated by the second information in the received image information, extracting effective information included in the first object of the received image information in response to the recognized position information, and outputting related information corresponding to the recognized effective information.

Task migration method and apparatus

An apparatus is provided comprising a memory and a processor configured to: execute a device driver for operating a device; detect a data throughput associated with the device driver; identify a configuration setting based on the data throughput; and re-configure the apparatus based on the configuration setting.

Method and apparatus for adaptive device re-configuration

A method for determining task priorities in an electronic device is provided. The method includes receiving, at the electronic device, a request to perform a task, identifying a threshold parameter and a weighted value in accordance with a type of the requested task, measuring the threshold parameter of the task based on the identified weighted value, and assigning the requested task to one of a first operational unit and a second operational unit based on the measured threshold parameter and weighted value.

Method for assigning priority to multiprocessor tasks and electronic device supporting the same

Provided is a method for task migration in an electronic device. The method includes: assigning a task with a specific function to a first group among groups formed according to a preset criterion; assigning the first group to one of first processing units functionally connected to the electronic device; and migrating, when the first group matches preset criteria of second processing units functionally connected to the electronic device, the first group to one of the second processing units. Based on this, it is possible to create various other embodiments.

Method for task group migration and electronic device supporting the same

A method for task scheduling and an electronic device using the same are provided. The method for scheduling tasks in an electronic device includes assigning a task to one of first processing units functionally connected to the electronic device, measuring a task load of the task, and controlling migration of the task to one of second processing units functionally connected to the electronic device based on the task load.

Method for task scheduling and electronic device using the same

In various embodiments, devices and methods for controlling the operation of at least one arithmetic and logic unit are disclosed. In various embodiments, methods and devices for controlling an arithmetic logic unit are disclosed. More particularly, devices may comprise at least one arithmetic and logic unit for processing a task, and a processor for controlling the arithmetic and logic unit according to an electric current consumed by the arithmetic and logic unit at an operating frequency of the arithmetic and logic unit.

Growing community of inventors

Gyeonggi-do, South Korea

Joohwan Kim