Samsung Electronics Co., Ltd.

Joohee Jung

Junggun You

Dongil Bae

Changwon Kim

Taeyoung Kim

Daewon Kim

Jinbum Kim

Sungil Park

Jaehoon Shin

Beomjin Park

Youngchan Woo

Joohee Park

Gulji Chung

Jaehyeoung Ma

Sunggi Hur

Para Kang

Namhyun Lee

Joonhye Baek

Junyeon Heo

An electronic device includes a communication module, and processor and a memory. The communication module connects with an Internet of Things server and plural smart devices. The processor is operatively connected to the communication module. The memory is operatively connected to the processor and includes instructions which, when executed by the processor, cause the processor to configure a control interface for controlling operations of the smart devices according to a user schedule type of a user schedule, and control the operations of the smart devices through the control interface.

Electronic device and method of operating the same

An electronic device may include: a communication module; a processor operatively connected to the communication module; and a memory operatively connected to the processor and configured to store computer program code. The computer program code, when executed, enables the processor to: upon detection of execution of a first operation of a first Internet of Things (IoT) device, obtain, from the memory, a first instruction to operate the first IoT device in a second operation; transmit the first instruction to the first IoT device to operate the first IoT device in the second operation; and monitor execution of the second operation by the first IoT device.

Method for sharing instructions for IoT apparatuses, and electronic device

A semiconductor device including a substrate having a central region and a peripheral region; an integrated circuit structure on the central region; and a first structure on the peripheral region and surrounding the central region, wherein a portion of the first structure includes a first fin structure defined by a device isolation region in the substrate; a first dielectric layer covering an upper surface and side surfaces of the first fin structure and an upper surface of the device isolation region; a first gate structure on the first fin structure, the first gate structure including a first gate conductive layer, a first gate dielectric layer covering lower and side surfaces of the first gate conductive layer, and first gate spacer layers on side walls of the first gate conductive layer; and a first insulating structure covering the first dielectric layer and the first gate structure.

Semiconductor device

A semiconductor device includes a substrate including first and second active regions extending in a first direction and isolated from direct contact with each other in the first direction; a device isolation layer between the first and second active regions in the substrate; and first and second gate structures extending in a second direction on the substrate while respectively intersecting end portions of the first and second active regions. The first gate structure includes a first gate electrode. The second gate structure includes a second gate electrode. The first gate structure protrudes further toward the device isolation layer, as compared to the second gate structure, in a vertical direction that is perpendicular to the first and second directions, and a lower end of the first gate electrode is located on a lower height level than a lower end of the second gate electrode.

Semiconductor devices having reflective symmetry

A semiconductor device includes an active region extending from a substrate in a vertical direction, source/drain regions spaced apart from each other on the active region, a fin structure between the source/drain regions on the active region, the fin structure including a lower semiconductor region on the active region, a stack structure having alternating first and second semiconductor layers on the lower semiconductor region, a side surface of at least one of the first semiconductor layers being recessed, and a semiconductor capping layer on the stack structure, an isolation layer covering a side surface of the active region, a gate structure overlapping the fin structure and covering upper and side surfaces of the fin structure, the semiconductor capping layer being between the gate structure and each of the lower semiconductor region and stack structure, and contact plugs electrically connected to the source/drain regions.

Semiconductor device including active region and gate structure

An electronic device is provided and includes a communication circuit, a memory, and a processor connected to the communication circuit and the memory. The memory may store instructions causing, upon being executed, the processor to store a usage history in the memory, the usage history collected from a plurality of user devices registered in a user device group through the communication circuit, to receive device information indicating functions of a first user device in the user device group from the first user device or a second user device in the user device group through the communication circuit, to select a function to be recommended to a user from among the functions of the first user device, based on at least the usage history, to generate a customized manual to allow the user to use the recommended function of the first user device, and to transmit, to the first user device or the second user device through the communication circuit, the customized manual or recommendation information for recommending the customized manual to the user.

Electronic device for supporting customized manual

A semiconductor device includes an active pattern extending on a substrate in a first direction, divided into a plurality of regions by a separation region, and having a first edge portion exposed toward the separation region; first, second and third channel layers vertically separated and sequentially disposed on the active pattern; a first gate electrode extending in a second direction, intersecting the active pattern, and surrounding the first, second and third channel layers; source/drain regions disposed on the active pattern, on at least one side of the first gate electrode, and contacting the first, second and third channel layers; a semiconductor structure including first semiconductor layers and second semiconductor layers alternately stacked on the active pattern, and having a second edge portion exposed toward the separation region; and a blocking layer covering at least one of an upper surface, side surfaces, or the second edge portion, of the semiconductor structure.

Growing community of inventors

Seoul, South Korea

Joohee Jung