Samsung Electronics Co., Ltd.

Bio-synectics Inc.

Joo Won Park

Kyeong Jin Park

Kwang Soo Kim

Kab Sig Kim

Yun Hee Lee

Eun Yong Lee

Si On Kang

Jae Woo Choi

Yong Suk Jin

Won Suk Lee

Semiconductor devices are provided. A semiconductor device includes a substrate and a stacked structure in which a plurality of insulating layers and a plurality of electrode layers are alternately stacked on the substrate. The semiconductor device includes a plurality of dummy channel structures that pass through the stacked structure. Moreover, the semiconductor device includes a contact structure in contact with at least one of the plurality of dummy channel structures adjacent thereto, and in contact with one of the plurality of electrode layers.

Semiconductor devices including a contact structure that contacts a dummy channel structure

A vertical-type memory device includes a plurality of gate electrode layers spaced apart from one another and stacked on a substrate, and extending by different lengths in a first direction and forming a staircase structure, a first interlayer insulating layer covering the staircase structure of the plurality of gate electrode layers, and a plurality of gate contact plugs penetrating the interlayer insulating layer and respectively in contact with the gate electrode layers. The plurality of gate electrode layers include lower gate electrode layers disposed adjacently to the substrate, and upper gate electrode layers disposed on the lower gate electrode layers, so that the lower gate electrodes are between the substrate and the upper gate electrode layers. The plurality of gate contact plugs include lower gate contact plugs connected to the lower gate electrode layers, and upper gate contact plugs connected to the upper gate electrode layers. The upper gate contact plugs have top-most portions disposed at a height higher than a height of top surfaces of the lower gate contact plugs.

Vertical-type memory device

The present invention relates to a method for manufacturing nano-scale particles of an active material. More particularly, the present invention relates to a method which uniformly mixes a surfactant having an HLB value of 8 or more and a melting point or glass transition temperature of 80&#xb0; C. or lower and an active material, and mills the mixture using a roller mill, to thereby prepare nanoparticle powder from the active material.

Method for preparing nano particles

The present invention relates to a method for preparing nano-particles, and more particularly, to a method for preparing nano-particles containing active materials in a simple and highly efficient manner through a grinding process.

Method for preparing nano-particles utilizing a saccharide anti-coagulant

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Seoul, South Korea

Joo Won Park