Amdahl Corporation

Jongwen Chiou

Eugene T Wang

Stephen J Rawlinson

Stephen S Si

A clock control apparatus that stops a system clock in a high performance high speed computer a determined number of system clock cycles after the generation of the clock control signal by a digital computer. The apparatus receives a basic clock signal and the clock control signal and generates a system clock for the system. The system clock includes a normal system clock signal and at least one early system clock signal. The basic clock is provided through a delay tap generating a normal basic clock signal and at least one early basic clock signal. In addition, a control state machine receiving the normal basic clock signal and the at least one early basic clock signal and responsive to the clock control signal is provided for starting and stopping the system clock. The clock control signal is synchronized with the earliest system clock and supplied to the clock control state machine.

Deterministic clock control apparatus for a data processing system

Dedicated convert hardware is disclosed for performing bidirectional conversions of numbers between binary and another base b (illustratively decimal) for use in a data processing system. The dedicated convert hardware comprises a special purpose multiply-and-add unit and a convert register. The output of the multiply-and-add unit is coupled to the input of the convert register, and the output of the convert register is recycled to the inputs of the multiply-and-add unit. The multiply-and-add unit is hardwired to multiply the input by b and concurrently add the value at a separate digit input. Means are also provided for initializing the convert register with zero or with any desired number. The convert hardware is operated to convert a number from radix-b to binary by first initializing the convert register to zero and then iteratively clocking the multiply-and-add unit output into the convert register while presenting to the digit input of the multiply-and-add unit successively high- to low-order digits of the radix-b number. The convert hardware is operated to convert a binary number to radix-b by first initializing the convert register with the fractional part of a product N*b.sup.-m, where N is the binary number and m is an integer greater than zero, and then repetitively clocking the output of the multiply-and-add unit into the convert register while the digit input of the multiply-and-add unit is held at zero. The integer part of each successive multiplication constitutes the successive radix-b digits.

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San Jose, CA, United States of America

Jongwen Chiou