Samsung Electronics Co., Ltd.

Jongsik Chun

Kihyun Hwang

Juyul Lee

Hansoo Kim

Sunil Shim

Jaehoon Jang

Wonseok Cho

Jae-young Ahn

Kwangmin Park

Woonkyung Lee

Jaeyoung Ahn

Dongchul Yoo

Wookhyoung Lee

Bumsu Kim

Hyun Kyu Park

Hyun Ku Park

Provided is a semiconductor device including gate structures provided on a substrate, a separation insulating layer interposed between the gate structures, and a plurality of cell pillars connected to the substrate through each gate structure. Each gate structure may include horizontal electrodes vertically stacked on the substrate, and an interval between adjacent ones of the cell pillars is non-uniform.

Semiconductor device having staggered pillars

A three-dimensional (3D) semiconductor memory device includes an electrode separation pattern, a stack structure, a data storage layer, and a channel structure. The electrode separation pattern is disposed on a substrate. A stack structure is disposed on a sidewall of the electrode separation pattern. The stack structure includes a corrugated sidewall opposite to the sidewall of the electrode separation pattern. The sidewall of the electrode separation pattern is vertical to the substrate. A data storage layer is disposed on the corrugated sidewall. A channel structure is disposed on the charge storage layer.

Three-dimensional semiconductor memory devices and methods of fabricating the same

Semiconductor device

Growing community of inventors

Hwaseong-si, South Korea

Jongsik Chun