Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Samsung Sdi Co., Inc.

Postech Research and Business Development Foundation

Sungkyunkwan University

Samsung Displayco., Ltd.

Jongmin Lee

Shin Ae Jun

Doh Won Jung

Hyeyeon Yang

Jooyeon Ahn

Chan Kwak

Sungwoo Hwang

Se Yun Kim

Jeonil Lee

Woojin Lee

Yeonjin Lee

Jimin Choi

Jinyoung Hwang

Jin Hee Jeon

Soyoung Lee

Taekhoon Kim

Ha Il Kwon

Youngju Lee

Seungjun Lee

Yoongeon Kim

Nayoun Won

Sugwoo Jung

Jae-young Choi

Jinwoo Park

Tae Gon Kim

Jong Wook Roh

Mi Hye Lim

Minjung Choi

Taek Hoon Kim

Young Seok Park

Seungtae Ko

Bumjin Lee

Misun Kim

Seungho Choi

Kohei Ebisuno

Jaesun Yun

Yoon Chul Son

Youngin Hwang

Juik Lee

Jinsuop Youn

Bumhee Lee

Seonmyeong Choi

Heeyeon Kim

Joohyeon Jo

Hyunjoo Han

Jinsuk Lee

Illhwan Lee

Yongseon Jo

Minsu Cho

Yewon Shin

Shinbeom Choi

Byungno Kim

Nalae Lee

Changha Kwak

Jin A Kim

Seungju Han

Hyong Euk Lee

Kijun Lee

Myungkyu Lee

Garam Park

Minho Kim

Junsig Kum

Sunghoon Yang

Junghoon Han

Changbeom Park

Jae Seok Choi

Jun Chwae

Kyoung-Seok Moon

Yun Sung Woo

Deuk Kyu Moon

Sanghyun Kim

Hoyoun Kim

Eomji Jang

Kinam Kwon

Kimoon Lee

Hee Jung Park

Yong Jun Park

Yongjun Park

Yoonmyung Lee

Mooho Lee

Donghyeon Lee

Jungi Jeong

Yong Hee Cho

Sungsoo Jun

Kyunghae Lee

Seokmin Lee

Youngmoon Park

Yongjin Woo

Suyeon Kim

Seyoon Oh

Suhun Lim

Wooyoung Jeong

Hoonmin Kim

Hyeonsu Heo

Changho Park

Yebin Jung

Gwangun Oh

Yongmin Lee

Eunchul Kwon

Youngman Song

A method and apparatus for image restoration based on burst images. The method includes generating a plurality of feature representations corresponding to individual images of a burst image set by encoding the individual images, determining a reference feature representation from among the plurality of feature representations, determining a first comparison pair including the reference feature representation and a first feature representation of the plurality of feature representations, generating a first motion-embedding feature representation of the first comparison pair based on a similarity score map of the reference feature representation and the first feature representation, generating a fusion result by fusing a plurality of motion-embedding feature representations including the first motion-embedding feature representation, and generating at least one restored image by decoding the fusion result.

Method and apparatus for image restoration based on burst image

A method with image correspondence includes: acquiring a plurality of feature map pairs corresponding to outputs of a plurality of layers of a convolutional neural network (CNN) in response to an input of an input image pair; selecting a portion of feature map pairs from among the plurality of feature map pairs based on a feature of each of the plurality of feature map pairs; generating a hyper feature map pair based on the selected portion of feature map pairs; and generating a correspondence result of the input image pair based on a correlation of the hyper feature map pair.

Method and apparatus with image correspondence

A semiconductor device according to the disclosure includes a substrate, a transistor connected to the substrate, and a wiring structure including contact wirings electrically connected to the transistor. The wiring structure further includes a first wiring insulating layer, a first material layer contacting the first wiring insulating layer, a second material layer contacting the first material layer, and a second wiring insulating layer contacting the second material layer. The first material layer includes SiN, and the second material layer includes SiCN. A dielectric constant of the first wiring insulating layer is greater than a dielectric constant of the second wiring insulating layer.

Semiconductor device including multi-capping layer and method for manufacturing the same

The disclosure relates to a pre-5-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4-Generation (4G) communication system such as Long Term Evolution (LTE). According to embodiments of the present disclosure, an electronic device may include: a printed circuit board (PCB); an antenna; a radome; and a coupling structure, the antenna may be disposed to be positioned at a first height from a first surface of the PCB, the coupling structure may be physically connected with the radome, and the coupling structure may be disposed to have a second height lower than or equal to the first height, with respect to the first surface of the PCB.

Antenna radome and electronic device including the same

A semiconductor device may include lower electrodes on a substrate, a first upper support layer pattern on upper sidewalls of the lower electrodes, and a dielectric layer and an upper electrode on surfaces of the lower electrodes and the first upper support layer pattern. The lower electrodes may be in a honeycomb pattern with the lower electrodes are at vertexes and center of a hexagon. The first upper support layer pattern may be a first plate shape including openings exposing some of all the lower electrodes. The lower electrodes may form rows in a first direction, the rows arranged in a second direction perpendicular to the first direction. Each opening may expose portions of upper sidewalls of at least four lower electrodes in two adjacent rows. Each of the openings may have a longitudinal direction in the first direction. In semiconductor devices, defects from bending stresses may be decreased.

Semiconductor device including a support layer with openings

A semiconductor device includes a substrate, an etch stop layer on the substrate, a through-hole electrode extending through the substrate and the etch stop layer in a vertical direction substantially perpendicular to an upper surface of the substrate, and a conductive pad. The etch stop layer includes a first surface adjacent to the substrate and a second surface opposite the first surface. The through-hole electrode includes a protrusion portion that protrudes from the second surface of the etch stop layer. The conductive pad covers the protrusion portion of the through-hole electrode. The protrusion portion of the through-hole electrode is not flat.

Semiconductor devices including a through-hole electrode

Provided are a thin film transistor substrate which include a substrate, a buffer layer and a thin film transistor, a display apparatus including the thin film transistor substrate, and a method of manufacturing the display apparatus including the thin film transistor substrate. The buffer layer includes an inorganic insulating layer. An area ratio of a peak corresponding to an N—H bond in the buffer layer is 0.5% or less based on a total peak area in a Fourier transform infrared spectroscopy (FTIR).

Thin-film transistor, display apparatus including the same, and method of manufacturing display apparatus

A semiconductor device includes; a semiconductor substrate including a chip area and a scribe lane area, a low-k layer on the semiconductor substrate, an interlayer insulating layer on the low-k layer, a trench area in the scribe lane area, a gap-fill insulating layer in the trench area and vertically extending from the semiconductor substrate through the low-k layer and the interlayer insulating layer to expose an upper surface of the gap-fill insulating layer through the interlayer insulating layer, and a first metal liner covering a side surface of the gap-fill insulating layer and disposed between the gap-fill insulating layer and the low-k layer and between the gap-fill insulating layer and the interlayer insulating layer.

Semiconductor device with crack-preventing structure

A color conversion panel that includes a color conversion layer including one or more color conversion regions, and optionally, a partition wall defining the regions of the color conversion layer, and a display device including the same. The color conversion region includes a first region corresponding to a first pixel, and the first region includes a first composite including a matrix and a plurality of luminescent nanostructures dispersed in the matrix. The luminescent nanostructures include a first semiconductor nanocrystal including a Group III-V compound and a second semiconductor nanocrystal including a zinc chalcogenide. The Group III-V compound includes indium, phosphorus, and optionally, zinc or gallium, or zinc and gallium, and the zinc chalcogenide includes zinc, selenium, and sulfur. The luminescent nanostructures do not include cadmium. The luminescent nanostructures further include fluorine, and in the luminescent nanostructures, a mole ratio of fluorine to indium is greater than or equal to about 0.05:1.

Luminescent nanostrucure, and color conversion panel and electronic device including the same

A semiconductor device according to some example embodiments includes a substrate, an insulating structure covering the substrate, a transistor between the substrate and the insulating structure, a via insulating layer extending through the insulating structure and the substrate, a plurality of via structures extending through the via insulating layer, a plurality of conductive structures respectively connected to the plurality of via structures, and a plurality of bumps respectively connected to the conductive structures.

Semiconductor device including via structure and method for manufacturing the same

A semiconductor device includes a substrate including a first surface, and a second surface opposing the first surface. A via insulating layer extending through the substrate is disposed. A through-silicon via extending through the via insulating layer is disposed. The center of the through-silicon via is misaligned from the center of the via insulating layer. A blocking layer is disposed on the first surface. A first insulating layer is disposed on the blocking layer. A contact plug contacting the through-silicon via and extending through the first insulating layer and the blocking layer is disposed.

Semiconductor device including through-silicon via and method of forming the same

A thermal pad of a semiconductor chip, a semiconductor chip including the thermal pad, and a method of manufacturing the semiconductor chip, the thermal pad including a thermal core in a trench at a lower surface of a semiconductor substrate, the thermal core being configured to receive heat generated from a through silicon via (TSV) vertically extending through the semiconductor substrate; a thermal head connected to the thermal core and protruding from the lower surface of the semiconductor substrate, the thermal head being configured to dissipate the heat in the thermal core; a first insulation layer between an inner surface of the trench and the thermal core; and a second insulation layer between the first insulation layer and the thermal core.

Thermal pad, semiconductor chip including the same and method of manufacturing the semiconductor chip

The disclosure relates to a fifth generation (5G) or pre-5G communication system supporting higher data rates after a fourth generation (4G) communication system such as Long Term Evolution (LTE). A module in a wireless communication system is provided. The module includes a plurality of antenna elements, an antenna substrate coupled to the plurality of antenna elements, a metal plate coupled to the antenna substrate, a calibration substrate coupled to a Radio Frequency (RF) component on a first face, and a conductive adhesive material for electrical coupling between the metal plate and the calibration substrate. The conductive adhesive material may be coupled to the calibration substrate on a second face different from the first face of the calibration substrate. The conductive adhesive material may include an air gap formed along a signal line included in the calibration substrate.

Antenna structure and electronic device including the same

A semiconductor device may include a cell capacitor including first lower electrodes, a first upper support layer pattern, a first dielectric layer, and a first upper electrode. The decoupling capacitor may include second lower electrodes, a second upper support layer pattern, a second dielectric layer, and a second upper electrode. The first and second lower electrodes may be arranged in a honeycomb pattern at each vertex of a hexagon and a center of the hexagon. The first upper support layer pattern may be connected to upper sidewalls of the first lower electrodes. The first upper support layer pattern may correspond to a first plate defining first openings. The second upper support layer pattern may be connected to upper sidewalls of the second electrodes. The second upper support layer pattern may correspond to a second plate defining second openings having a shape different from a shape of the first opening.

Semiconductor device

A semiconductor device includes a stacked structure disposed on a substrate. The stacked structure includes a plurality of insulation layers and a plurality of electrode layers alternately stacked in a third direction intersecting with first and second directions. A plurality of channel structures extends through the stacked structure in the third direction. A first wiring group includes a plurality of first horizontal wirings disposed on the stacked structure that are arranged in the first direction and extends in the second direction. A second wiring group includes a plurality of second horizontal wirings disposed on the stacked structure that are arranged in the first direction and extends in the second direction. Each of the plurality of first and second horizontal wirings are connected to corresponding one of the plurality of channel structures. A first line identifier is disposed between the first wiring group and the second wiring group.

Semiconductor devices including line identifier

Growing community of inventors

Hwaseong-si, South Korea

Jongmin Lee