Samsung Electronics Co., Ltd.

Samsung Sdi Co., Inc.

Hyundai Motor Company

Lg Display Co., Ltd.

Lg Electronics Inc.

Kia Motors Corporation

Kia Corporation

Yale University

Other

Seoul National University

Sungkyunkwan University

Industry-University Cooperation Foundation Hanyang University

Sk Telecom Company, Ltd.

Snu Rdb Foundation

Chung Ang University Industry Academic Cooperation

Jongmin Kim

Donggyu Chang

Jinhwa Kim

TaeJoon Song

Pilsang Yun

Jangsuk Hyun

Wooyoung Yang

Hyunbeom Kim

Jiyoon Kim

JongSool Park

KyeongHun Lee

Suengho Lee

Kwanghwan Cho

Kiseok Lee

Hui-Jung Kim

Sohyun Park

Myeong-Dong Lee

Junhyeok Ahn

Sang Hwi Lee

Sang Yoon Lee

Youngsoo Kim

Youngjin Cho

Jeongho Lee

Hyeonjae Lee

Yeunwook Lim

Sung Hyun Moon

Jin Young Park

Jung Hoon Park

Sukgi Hong

Youngtack Shim

Minho Kim

Hongrak Son

Jungwoo Lee

Jaeyoung Choi

Jongwu Baek

Chan-Sic Yoon

Byungjin Choi

In Woo Ha

Jungho Ahn

Youngki Lee

Hanyeop Lee

Jihun Lee

Mi Sun Kim

Wooyoung Choi

Jungeun Lee

Gun Lim

Yongchan You

Eun Jung Kim

Chungsam Jun

Youngkyun Moon

Sungrae Cho

Junho Shin

Minhan Kim

Byunghyun Lee

Seongwook Hwang

Sangho Hong

Kyonghwan Cho

Woo Yong Lee

Hyo-Sub Kim

Kwang Sik Yang

Chan Hee Park

Byungho Kim

Kwang Seok Ko

Soon Ok Lee

Donghyun Kil

Kyounghee Kim

Soohyeon Kim

Kyu-Hwang Lee

Sungjong Seo

Sangil Han

Youngsik Moon

Jongdoo Kim

Suyoung Lee

Jongjin Park

Hyosub Kim

Jeong Hwan Ahn

Hoojong Kim

Ickkyu Choi

Hanbyeul Na

Sangin Park

Soobo Park

Soonrewl Lee

Jaedeok Cha

Kiyong Ahn

Sangki Woo

Gunhee Park

Taihwan Choi

Chansic Yoon

Duk Jin Park

Inseong Hwang

Jae Man Cho

Youngjoo Chae

Kwanggu Lee

Haesoo Kim

Jaehyun Kwon

Kwangil Shin

Daeseung Park

Yonghwan Hyun

Jeongil Lee

Sangsoo Ahn

According to various embodiments of the present disclosure, a method of operating a first apparatus in a short-range wireless communication system, the first apparatus includes: a first processor corresponding to a host stack; a second processor corresponding to a controller stack; a memory; an input device corresponding to a user interface (UI); an output device corresponding to the UI; and a transceiver, wherein the host stack and the controller stack are connected through a host controller interface (HCI), the method comprising: receiving a switching input from a basic mode to a hybrid mode based on an input of the UI, wherein the first apparatus corresponds to a host, a second apparatus corresponds to a peripheral device, and the first apparatus and the second apparatus are connected through a generic attribute profile (GATT) channel; transmitting a first command message instructing the second apparatus to switch to the hybrid mode, wherein the first command message includes ultra low latency human interface device (ULL HID) parameters; and performing communication with the second apparatus through a connected isochronous stream (CIS) channel in addition to the GATT channel based on the ULL HID parameters.

Apparatus and method for performing dynamic mode switching in short range wireless communication system

A positive active material for an all-solid secondary battery, an all-solid secondary battery including the same, and a method of manufacturing the positive active material for an all-solid secondary battery, the positive active material including a secondary particle including a plurality of primary particles; and a buffer layer on a surface of the secondary particle; wherein the secondary particle includes a nickel lithium transition metal oxide represented by Formula 1, the buffer layer includes a copper compound represented by Formula 2,LiNiMOA  <Formula 1>LiCuX.  <Formula 2>

Positive active material for all solid secondary battery, and all solid secondary battery including the same

A semiconductor device includes a cell active pattern including a first portion and a second portion that are spaced apart from each other; a gate structure between the first portion and the second portion of the cell active pattern; a bit-line contact on the first portion of the cell active pattern; a connection pattern on the second portion of the cell active pattern; and a cell separation pattern in contact with the bit-line contact and the connection pattern, wherein the cell separation pattern includes a first sidewall in contact with the connection pattern and a second sidewall in contact with the bit-line contact, an upper portion of the second sidewall of the cell separation pattern is in contact with the bit-line contact, and a lower portion of the second sidewall of the cell separation pattern is spaced apart from the bit-line contact.

Semiconductor device having a cell separation pattern in contact with the bit line contact

One embodiment of the present disclosure provides a wireless audio output device for outputting audio content, comprising: an audio output unit; a communication unit for receiving audio broadcast signals; and a processor for generating a broadcast channel list including one or more output candidate channels from among received broadcast channels corresponding to the audio broadcast signals, outputting the broadcast channel list through the audio output unit, selecting one output channel from the broadcast channel list on the basis of a user input, and outputting audio content corresponding to the output channel through the audio output unit.

Wireless audio output device for outputting audio content, and method therefor

A semiconductor memory device includes: a device isolation pattern provided on a substrate to provide a first active portion and a second active portion; a first storage node pad disposed on the first active portion; a second storage node pad disposed on the second active portion; a pad separation pattern disposed between the first and second storage node pads; a word line disposed in the substrate to cross the first and second active portions; a bit line disposed on the pad separation pattern and crossing the word line; a buffer layer disposed on the pad separation pattern; and a mask polysilicon pattern interposed between the buffer layer and the bit line, wherein a side surface of the mask polysilicon pattern is substantially aligned to a side surface of the bit line, and the mask polysilicon pattern is vertically overlapped with the pad separation pattern.

Semiconductor memory device

An electronic device is provided. The electronic device includes an electronic component including a coil therein, and a printed circuit board that is disposed to surround at least a part of the electronic component and includes plural slits disposed at preset intervals in at least one of regions facing the electronic component, wherein each of the plural slits may include a central slit portion extended along a center of the slit, and a symmetric slit portion extended to be symmetric with respect to the central slit portion.

Printed circuit board and electronic device including the same

According to an embodiment of the disclosure, an electronic device may include: a front plate, a rear plate disposed opposite the front place, a side surface part surrounding at least a part of a space between a front plate and the rear plate, a support disposed in the space and laterally surrounded by the side surface part, communication circuitry configured to transmit and/or receive a signal having a selected or designated frequency band through a conductive unit comprising a conductive material having at least a part thereof included in the side surface part, a display disposed between the support and the front plate and visible through the front plate, a first circuit substrate electrically connected to the display, disposed between the display and the support, and that a display driving circuit is disposed thereon, a second circuit substrate electrically connected to the display, disposed between the display and the support, and that a touch controller IC is disposed thereon, a first conductive sheet having at least a part thereof disposed between the support and the first circuit substrate, and a second conductive sheet disposed in the support between the display and the support and including a first conductive area overlapping the first conductive sheet when viewed over the rear plate and a second conductive area extending from the first conductive area and overlapping the second circuit substrate.

Electronic device including antenna

A method of operating a homomorphic encryption operation accelerator includes performing a number theoretic transform (NTT) operation on each of first homomorphic ciphertext and second homomorphic ciphertext, and performing a base conversion operation by adding a partial sum using a first value of the NTT operation.

Homomorphic encryption operation accelerator, and operating method of homomorphic encryption operation accelerator

An electronic apparatus including a display; a storage; and a processor. The processor is configured to control the storage to store codes of a first application including codes related to execution of a second application that are compiled before a request to execute the first application is received, based on the request to execute the first application being received. The processor is configured to execute the codes of the first application and the compiled codes related to the second application, and control the display to display a first menu item of the first application and a second menu item of the second application.

Electronic device and control method thereof

Provided is a semiconductor device including a conductive contact plug on a substrate, the conductive contact plug including a lower portion and an upper portion on the lower portion, the lower portion having a first width, and the upper portion having a second width less than the first width, a bit line structure on the conductive contact plug, the bit line structure including a conductive structure and an insulation structure provided in a vertical direction perpendicular to an upper surface of the substrate, and a first lower spacer, a second lower spacer, and a third lower spacer sequentially provided on a sidewall of the lower portion of the conductive contact plug in a horizontal direction parallel to the upper surface of the substrate, wherein an uppermost surface of the third lower spacer is higher than an upper surface of the first lower spacer and an upper surface of the second lower spacer.

Semiconductor devices

A control valve includes: a valve housing; a coolant port formed in the valve housing and through which coolant inflows; an oil cooler port formed in the valve housing; a heater port formed in the valve housing; a radiator port formed in the valve housing; a bypass flow path through which the coolant port and the heater port communicate; and a ball valve, wherein the coolant port and the oil cooler port selectively communicate and the coolant port and the radiator port selectively communicate while the ball valve rotates inside the valve housing, wherein a valve inlet which communicates with the coolant port is formed in the ball valve, and a first section outlet, a second section outlet, and a third section outlet, which selectively communicate with the valve inlet are formed consecutively on an outer periphery of the ball valve.

Control valve and cooling system for a vehicle

A memory system includes a memory controller and a memory device including a plurality of dies, each die including a plurality of blocks. A plurality of commands are configured to control the memory device in units of super blocks. During a first time interval, a first erase operation is performed on a first-first block among the first-first block to a first-Mth block, and a first program operation is performed on a second-first block to a second-Mth block, based on the first commands. During a second time interval, a second erase operation is performed on a first-second block among the first-first block to the first-Mth block, and a second program operation is performed on the first-first block and one or more blocks among the second-first block to the second-Mth block, based on the second commands.

Systems and methods for selectively controlling programming operations of a memory system comprising a plurality of super blocks

Provided is a positive active material for a rechargeable lithium battery including a nickel-based composite oxide having a nickel content of greater than or equal to 60 mol % relative to a total amount of metal excluding lithium and a coating layer on the surface of the nickel-based composite oxide, wherein the coating layer includes lithium fluoride (LiF) and metal fluoride produced by firing a metal oxide and a fluorine-based organic material.

Cathode active material for rechargeable lithium battery comprising coating layer comprising lithium fluoride and metal fluoride and method for manufacturing the same

Disclosed are a cathode active material for a lithium secondary battery and a lithium secondary battery including the same. The cathode active material includes a secondary particle in which a plurality of primary particles are agglomerated, wherein the secondary particle has a predetermined arrangement structure in which (003) surface of primary particles are aligned to be in a vertical direction with respect to a tangent line at a point (P) at which the (003) surface of the primary particles meet a surface of the secondary particle.

Cathode active material for lithium secondary battery and lithium secondary battery including same

An electronic device may include a printed circuit board including a connector configured to move between a first position and a second position on the printed circuit board; an antenna; a support member that is disposed between the printed circuit board and the antenna in a direction in which the printed circuit board, the support member, and the antenna are stacked; a signal connection member that is electrically connected to the connector of the printed circuit board; and a conductive member disposed between the printed circuit board and the support member, and aligned to cover the first position and the second position of the printed circuit board.

Growing community of inventors

Seoul, South Korea

Jongmin Kim