Sungkyunkwan University

Jongmin Baek

Keewon Kwon

Dongjin Seo

Disclosed are a semiconductor memory apparatus, a program method, and a program system. The semiconductor memory apparatus includes a memory cell array including a plurality of resistive memory cells and a control block configured to variably control, based on digital code values reflecting resistance states of the resistive memory cells, at least one of a initial voltage magnitude and an initial voltage applying time in an incremental step pulse programming (ISPP) mode for the plurality of memory cells. Therefore, even in the case of the worst cell, the incremental step of the ISPP may be minimized, and the writing time may be reduced, limiting unnecessary current consumption.

Resistive semiconductor memory capable of performing incremental step pulse programming (ISPP) based on digital code values of memory cells

Disclosed are a semiconductor memory apparatus, and verify read method and system. The semiconductor memory apparatus includes a memory cell array including a plurality of resistive memory cells; and a control block controlling a resistance state of the memory cell to be discriminated based on a digital code value of at least 2 bits or more reflecting the resistance states of the plurality of resistive memory cells. Therefore, data of the memory is discriminated by analyzing distribution of the digital code values to monitor a characteristic of a current memory cell array and read the data having reliability.

Semiconductor memory device and method for reading the same using a memory cell array including resistive memory cells to perform a single read command

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Imsil-gun, South Korea

Jongmin Baek