Samsung Electronics Co., Ltd.

Jonglae Park

Choonghoon Park

Youngtae Lee

Hyunchul Seok

Bumgyu Park

Sangkyu Kim

Jungwook Kim

Hojin Kim

Kwanjin Jung

Byungsoo Kwon

Hanjun Shin

Gurnrack Moon

Daeyeong Lee

Hyunji Hong

Junhwa Seo

Youngcheol Shin

Hyunju Kang

Seyeong Byeon

A task scheduling method for a central processing unit (CPU) including a plurality of cores includes receiving a task processing request, obtaining first feedback data for the plurality of cores, obtaining second feedback data for an external intellectual property (IP) block outside the CPU, and assigning a task to at least one of the plurality of cores based on the first feedback data and the second feedback data.

Task scheduling method, and computing device and application processor using the same

An electronic device includes a clock management unit configured to generate a clock signal, an intellectual property (IP) device configured to receive the clock signal and is configured to perform a task according to the clock signal in an active state, a first counter configured to count cycles of the clock signal while the IP device is in the active state, and is configured to generate a first count, and a frequency controller configured to control the clock management unit to change a frequency of the clock signal when the first count reaches a first reference count.

Electronic device controlling frequency of clock signal and method of operating the electronic device

A method of controlling an operation of a multi-core system including a plurality of processor cores, includes, monitoring task execution delay times with respect to tasks respectively assigned to the plurality of processor cores, monitoring core execution delay times with respect to the plurality of processor cores and controlling an operation of the multi-core system based on the task execution delay times and the core execution delay times.

Multi-core system and method of controlling operation of the same

An apparatus and a method for scheduling a task in an electronic device including a heterogeneous multi-processor are provided. The electronic device includes a memory and a processor operatively connected to the memory and including a plurality of heterogeneous cores. The processor may be configured to identify, when a task to be scheduled occurs, a scheduling group having the task among a plurality of predefined scheduling groups, and to perform scheduling for the task, based on the identified scheduling group having the task and a priority of the task.

Electronic device for scheduling based on heterogeneous multi-processor and operating method thereof

There is provided a method of controlling performance boosting of a semiconductor device. According to the method, input of a user is monitored. A performance of the semiconductor device is boosted by consecutively executing a plurality of boosting policies associated with a plurality of macros based on an input event associated with the input of the user and available energy during a boosting interval. Boosting level in each of the boosting policies may be adaptively determined based on the boosting level and the amount of usage of the semiconductor device used in the previous boosting policy and the boosting policies are consecutively executed. Accordingly, improved and/or optimal performance boosting can be provided to the semiconductor device and at the same time, a waste of power can be mitigated and/or prevented.

Method of controlling performance boosting of semiconductor device based on at least user input and feedback from previous boosting policies and semiconductor device performing the method

Dynamic voltage and frequency scaling (DVFS) is performed based on a power step by setting a plurality of power levels corresponding to a plurality of available frequencies of a clock signal for an operation of a processor, setting a plurality of power steps corresponding to the plurality of available frequencies, and controlling a conversion between the plurality of power levels based on a utilization of the processor and the plurality of power steps. Performance and power consumption of a processor are controlled efficiently by performing power level conversion based on the power step.

Method of performing dynamic voltage and frequency scaling based on power step

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Anyang-si, South Korea

Jonglae Park