Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Jongjin Lee

Eun-Ji Jung

Rakhwan Kim

Kyungmo Lee

Wonhyuk Hong

Seungyong Yoo

Minsu Choi

Kyungwook Kim

Sangwook Park

Jihun Lee

Jinkyu Park

Hikuk Lee

Horang Jang

Sangdon Jang

Sangjoon Hong

Inbae Chang

Hyungchul Choi

Joonseok Park

A semiconductor device includes transistors on a substrate, a first interlayered insulating layer on the transistors, first and second lower interconnection lines in an upper portion of the first interlayered insulating layer, and first and second vias on the first and second lower interconnection lines, respectively. Each of the first and second lower interconnection lines includes a first metal pattern. The first lower interconnection line further includes a second metal pattern, on the first metal pattern with a metallic material different from the first metal pattern. The second metal pattern is absent in the second lower interconnection line. The second via includes first and second portions, which are in contact with respective top surfaces of the first interlayered insulating layer and the second lower interconnection line, and the lowest level of a bottom surface of the second portion is lower than that of a bottom surface of the first via.

Semiconductor device having interconnection lines with different linewidths and metal patterns

An electronic device includes a system on chip (SoC) and a power management integrated circuit (PMIC). The SoC includes a plurality of power domains and a dynamic voltage and frequency scaling (DVFS) controller which performs DVFS on the power domains The PMIC includes direct current (DC)-DC converters and a control logic which controls the plurality of DC-DC converters, and each of the DC-DC converters provides a corresponding output voltage to a respective one of the power domains. The control logic designates a target DC-DC converter which provides a target output voltage having a target level as a global DC-DC converter and provides the target output voltage to a power domain corresponding the global DC-DC converter and to at least one first power domain consuming the target output voltage, from among the plurality of power domains, by sharing the target output voltage provided by the global DC-DC converter.

Electronic devices and methods of controlling power in electronic devices

Semiconductor devices includes a first interlayer insulating layer, a lower interconnection line in the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, and an upper interconnection line in the second interlayer insulating layer. The upper interconnection line includes a via portion extending through the etch stop layer and contacting the lower interconnection line. The via portion includes a barrier pattern and a conductive pattern. The barrier pattern includes a first barrier layer between the conductive pattern and the second interlayer insulating layer, and a second barrier layer between the conductive pattern and the lower interconnection line. A resistivity of the first barrier layer is greater than that of the second barrier layer. A nitrogen concentration of the first barrier layer is greater than that of the second barrier layer.

Semiconductor devices and methods for manufacturing the same

An apparatus includes a first circuit board, a driving chip, and a second circuit board. The driving chip is coupled to the first circuit board, and the second circuit board is spaced apart from and electrically connected to the driving chip. At least part of the second circuit board is spaced apart from a first surface of the first circuit board.

Circuit board and display device including the same

Provided is a display apparatus including: a display panel including a display area and a peripheral area; a printed circuit board attached to the peripheral area and including a ground portion and a test electrode spaced apart from the ground portion; a connector including a plurality of connector terminals connected to an external control apparatus and electrically connecting the printed circuit board and the external control apparatus to each other; and a cover layer arranged on the printed circuit board and covering at least a part of the printed circuit board. Accordingly, not only the display quality and reliability of the electric characteristics of the display apparatus are improved, but also a loss is reduced and a yield is improved during manufacturing processes.

Display apparatus

An optical apparatus and a manufacturing method using the optical apparatus are disclosed. The optical apparatus includes a stage supporting a substrate, first optical systems providing a first light onto the substrate, a gantry supporting the first optical systems to transfer them on the stage, and second optical systems disposed between the gantry and the stage and detecting displacement of the first optical systems. Each of the second optical systems includes a beam source generating a second light different with the first light, and sensor arrays for sensing the second light provided to the first optical systems to detect displacement of the first optical systems.

Optical apparatus and manufacturing method using the same

A display device includes: a system unit which output image signals corresponding to frames and a first or second image control signal based on the image signals; an eDP reception unit which receives the image signals and the first or second image control signal from the system unit, provides a still image signal based on the first image control signal, and provides the image signals based on the second image control signal; and a frame memory which stores the still image signal and outputs the still image signal while the first image control signal is provided to the eDP reception unit, where the still image signal is one of the image signals; the eDP reception unit recovers first clock signals based on the image signals; and the frame memory outputs the still image signal based on a second clock signal generated based on the first clock signal.

Growing community of inventors

Seoul, South Korea

Jongjin Lee