Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Korea University Research and Business Foundation

Jonghyun Lee

Geunwoo Ko

Jae-Kyoung Kim

Seongryong Lee

Eunjin Sung

Sangbum Lee

Dongyeoul Lee

Hongseok Lee

Minsu Kim

Geeyoung Sung

Wonsang Park

Jong-Young Hong

Seyoung Park

Punjae Choi

IlNam Kim

Yongmin Kwon

Gwangnae Gil

Sola Woo

Yuneseok Chung

Ji-Hun Ryu

Inho Kim

Hyun-Seung Song

Ji-hun Ryu

JungWoo Seo

Ilnam Kim

Nam Hoon Lee

Jaeyoon Kim

Gi-Nam Park

Kiwon Park

Kwang-Young Lee

Byungchul Choi

Hyeokman Kwon

Sungjin Park

Young Soo Kim

Hoon Song

Jinwoo Park

Hwi Dae Kim

Sungwook Lee

Nam-Gon Choi

Young Ju Kim

Young Wook Kim

Yunhee Kim

Keumdong Jung

Jongin Baek

Wonjin Seo

Namsung Kim

KyungTea Park

Sanghyun Kim

Dongju Lee

Goeun Cha

Kyounghwan Kwon

Bokyung Jung

Jeongmin Lee

Kangbin Jo

Daegi Lee

Hyunmin Oh

Dongseok Baek

Joonghan Shin

Jungwook Lee

Byung Joo Oh

Daemyung Chun

Insu Kim

Yoodong Yang

Daegyu Kang

Youngsub Shin

Dahyun Choi

Sungseung Lim

Leekwon Gil

Provided is a semiconductor fabrication facility including a chamber, a gas supply configured to provide reaction gas to the chamber, a plurality of vacuum pumps respectively configured to pump the reaction gas from the chamber, an exhaust apparatus that is connected to the plurality of vacuum pumps and configured to purify the reaction gas, an exhausting line between the exhaust apparatus and the plurality of vacuum pumps, a thickness detection apparatus connected to the exhausting line and configured to detect a thickness of a byproduct layer in the exhausting line, and a processor connected to the thickness detection apparatus and configured to display preventive maintenance of the exhausting line based on the thickness of the byproduct layer being greater than a threshold value.

Semiconductor fabrication facility

A method of operating an electrical test prediction apparatus includes determining a relationship between first electrical test (ET) data, corresponding to at least one shot region comprising a subset of a plurality of semiconductor chips of a wafer, and electrical die sorting (EDS) data, obtained by measuring a state of each chip on the wafer by a testing device, and predicting second ET data, corresponding to an region of the wafer other than the at least one shot region by performing machine learning on the relationship.

Computing devices for predicting electrical tests, electrical test prediction apparatuses having the same, and operating methods thereof

A display device may include a pixel and a sensor. The pixel may include an emission element and a pixel driving circuit. The pixel driving circuit may receive a first scan signal and a second scan signal. The sensor may include a light sensing element and a sensor driving circuit. The sensor driving circuit may include a reset transistor, an amplifying transistor, and an output transistor. The reset transistor may receive a reset voltage and the first scan signal and be connected to a first sensing node. The amplifying transistor may receive a first driving voltage and be connected between the first sensing node and a second sensing node. The output transistor may receive the second scan signals and be connected between the second sensing node and a readout line.

Display device

A three-dimensional holographic display device includes a light emitting diode (LED) array including a plurality of light sources controlled to sequentially output light according to a preset pattern, a lens configured to refract light incident from the LED array, a spatial light modulator (SLM) configured to modulate light incident from the lens, and a processor configured to generate a plurality of holographic signals each comprising depth information adjusted according to an arrangement location of each of the plurality of light sources, and for each of the plurality of light sources, control the SLM to modulate the light based on a holographic signal corresponding to the light source.

3D holographic display device and operating method of the same

To predict characteristics of a semiconductor device, a simulation current-voltage curve of the semiconductor device is generated using compact models where each compact model generates simulation result data by performing a simulation based on device data. The simulation result data indicate characteristics of semiconductor devices corresponding to the device data. The compact models respectively corresponding to process data and semiconductor products. Simulation reference points on the simulation current-voltage curve are extracted. Basic training data corresponding to a combination of the simulation reference points and the simulation current-voltage curve are generated. A deep learning model is trained based on the basic training data such that the deep learning model outputs a prediction current-voltage curve. A target prediction current-voltage curve is generated based on the deep learning model and target reference points corresponding to the target semiconductor product. The deep learning model is a generative adversarial network.

Method of predicting characteristic of semiconductor device and computing device performing the same

A light source module is provided. The light source module includes a printed circuit board; a light-emitting device mounted on the printed circuit board, the light-emitting device including a plurality of cell blocks, each of which includes a plurality of light-emitting cells; and a plurality of controllers mounted on the printed circuit board, each of which is configured to drive a cell block corresponding thereto, from among the plurality of cell blocks. The plurality of cell blocks are electrically isolated from each other, the plurality of cell blocks include a first cell block and a second cell block, and a number of first light-emitting cells included in the first cell block is less than a number of second light-emitting cells included in the second cell block.

Light-emitting device and light source module including the same

Measurement data are produced by measuring characteristics of a semiconductor device. Target parameters are selected among a plurality of parameters of a device model where the device model is configured to perform a simulation based on device data and output simulation result data indicating the characteristics of the semiconductor device. Initial value sets corresponding to different combinations of initial values of the target parameters are selected. Local minimum values are determined based on reinforcement learning. Each local minimum value corresponds to a minimum value of a difference between the measurement data and the simulation result data with respect to each initial value set. Optimal values of the target parameters are determined based on the plurality of local minimum values. The device model capable of precisely predicting characteristics of the semiconductor device is generated by determining the parameters of the device model using the optimization scheme based on the reinforcement learning.

Method of generating device model and computing device performing the same

A display device includes a substrate comprising a plurality of pixel areas and a non-pixel area surrounding each of the plurality of pixel areas. The non-pixel area includes a plurality of first areas and a second area surrounding the plurality of first areas. A functional layer is disposed on the substrate and includes a plurality of first holes defined through the functional layer and overlapping the plurality of first areas. An element layer is disposed on the functional layer. A pixel definition layer is disposed on the element layer and overlaps the non-pixel area. The pixel definition layer includes pixel openings defined therethrough. The pixel openings overlap the plurality of pixel areas. A plurality of light emitting elements is disposed on the element layer and is disposed in the pixel openings.

A semiconductor light emitting device is provided. The semiconductor light emitting device includes a plurality of light emitting structures, each of which includes a first surface and a second surface, a plurality of embossed portions provided on the first surface; a partition wall structure provided on the first surface of the plurality of light emitting structures and including a plurality of partition walls which define a plurality of pixel spaces; and a fluorescent layer provided in the plurality of pixel spaces. A bottom surface of the partition wall structure contacts the plurality of embossed portions.

Semiconductor light emitting devices and partition wall structure, and methods of manufacturing the same

Provided is a complex light modulator including a phase modulator, and an amplitude modulator, wherein the phase modulator and the amplitude modulator are configured to generate a first complex pixel having first complex light modulation characteristics and a second complex pixel having second complex light modulation characteristics, wherein the first complex pixel includes first sub-complex pixels that are provided in a 3×3 format and are configured to implement the first complex light modulation characteristics, wherein the second complex pixel includes second sub-complex pixels that are provided in a 3×3 format and are configured to implement the second complex light modulation characteristics, and wherein the first complex pixel and the second complex pixel respectively include a first overlapping pixel that is included in the first sub-complex pixels and the second sub-complex pixels.

Complex light modulator, holographic display apparatus, and method of generating hologram pattern

A display device includes a display panel, a display driver integrated circuit and a driving control circuit. The display panel includes a plurality of pixels connected to a plurality of driving lines and a plurality of source lines. The display driver integrated circuit includes a driving control signal generator. The driving control signal generator generates a driving control signal based on display device information and pixel values corresponding to at least a portion of the plurality of rows among a plurality of previous pixel values of a previous frame and a plurality of present pixel values of a present frame. The driving control circuit selectively connects the display driver integrated circuit with each of the plurality of driving lines based on the driving control signal such that first driving signals provided to first driving lines among the plurality of driving lines are blocked.

Display device for low power driving and method of operating the same

A semiconductor device includes a first active pattern on a substrate; a first gate electrode crossing the first active pattern; source/drain patterns in an upper portion of the first active pattern and at opposite sides, respectively, of the first gate electrode; a first gate capping pattern on the first gate electrode; an interlayer insulating layer on the source/drain patterns; first and second active contacts penetrating the interlayer insulating layer and being respectively connected to the pair of source/drain patterns; and a first interconnection layer on the first and second active contacts. The first interconnection layer may include a first insulating structure covering a top surface of the second active contact; and a first interconnection line covering a top surface of the first active contact and extending on the first insulating structure, and covering a top surface of the first gate capping pattern between the first and second active contacts.

Method of fabricating semiconductor device

Growing community of inventors

Suwon-si, South Korea

Jonghyun Lee