Samsung Electronics Co., Ltd.

Jonghoon Jung

Taejoong Song

Seungyoung Lee

Jung-Ho Do

Sanghoon Baek

Jungho Do

Jisu Yu

Seungyong Shin

Woojin Rim

Sungyeol Kim

Jinyoung Lim

Sounghoon Sim

Yongho Kim

Chunsoon Park

Junsung Choi

Changhoon Kim

Hyeongyu You

Yongmin Jung

Jungmo Kang

Hoonki Kim

Minjae Jeong

Kyehoon Lee

Jaewoo Seo

Giyoung Yang

Seokwoo Yong

Youngchol Lee

Changnam Park

Mi Yeon Ahn

A display device includes: a display panel; a light emitting unit; a driving circuit configured to control a driving current applied to the light emitting unit based on image data; and a controller configured to: obtain a selected mode of one of a low grayscale mode or a high grayscale mode based on a required luminance included in the image data, obtain a minimum value and a maximum value of the driving current based on the selected mode, based on an output range of the driving current being adjusted to obtain an adjusted output range, increase a number of luminance levels expressible within the adjusted output range to obtain an increased number of luminance levels, and control the driving circuit based on the increased number of luminance levels.

Display device and control method therefor having low grayscale mode and high grayscale mode

An integrated circuit may include a first function cell and a second function cell each corresponding to a first circuit, wherein the first function cell may include a first pattern extending in a first direction along a first grid in a first layer and a second pattern extending in the first direction along a second grid in a second layer, the first grid may have a first pitch greater than a second pitch of the second grid in a second direction crossing the first direction, and the second function cell may include a layout of the first function cell and have a length greater than a length of the first function cell by the first pitch in the second direction.

Integrated circuit including standard cells and method of designing the same

A display device includes: Light Emitting Diode (LED) blocks connected in series; a driver Integrated Circuit which supplies a current to the LED blocks and is connected in series to one of the LED blocks; switching elements connected in parallel to the LED blocks; and a controller for controlling on/off of the switching elements to adjust which LED block to supply the current, over a time for implementing a unit frame.

Display device and method for controlling same

Provided is a display apparatus having an improved degree of freedom in wiring design, the display apparatus including: a liquid crystal panel; and a light source apparatus, wherein the light source apparatus includes: a substrate; and a plurality of light emitting diodes (LEDs) provided on the substrate, wherein each of the plurality of LEDs has a lower surface in contact with a first feeding pad and a second feeding pad formed on the substrate, the lower surface of each of the plurality of LEDs includes a first contact area provided to be in contact with the first feeding pad, a second contact area provided to be in contact with the second feeding pad, and a non-contact area other than the first contact area and the second contact area on the lower surface, and each of the first contact area and the second contact area is smaller than the non-contact area.

Display apparatus and light source apparatus thereof

A display device, which fixes the magnitude of a driving current flowing through light-emitting devices in a low luminance region and controls an application period of the driving current, includes: light-emitting devices; a processor for controlling the light-emitting devices on the basis of a gray level required for the light-emitting devices in each unit frame; and a timing controller which divides the unit frame into a plurality of sub-frames and generates a scan signal corresponding to each sub-frame. The processor: when the gray level is greater than or equal to a preset value, determines a luminance value of the light-emitting devices on the basis of the gray level and turns on the light-emitting devices with the determined luminance value in all of the plurality of sub-frames; when the gray level is less than the preset value, determines a light-emitting period of the light-emitting devices on the basis of the gray level and divides, on the basis of the light-emitting period, the plurality of sub-frames into a first and a second sub-frame group; turns on the light-emitting devices with a preset luminance value in all sub-frames belonging to the first sub-frame group; and turns off the light-emitting devices in sub-frames belonging to the second sub-frame group or turns on the light-emitting devices with a luminance value less than the preset luminance value.

Display device and method for controlling the same

A display apparatus includes a liquid crystal panel, a power supply, a backlight unit including a plurality of sub-blocks configured to radiate light to the liquid crystal panel, and a controller configured to determine a peak voltage and a source voltage supplied to each of the plurality of sub-blocks. Each of the plurality of sub-blocks includes a first switching element configured to receive the peak voltage as a gate voltage, and a second switching element including a drain terminal connected to a source terminal of the first switching element, the second switching element configured to receive an amount of charges corresponding to the source voltage through a gate terminal.

Display apparatus for adjusting current provided to light emitting element and control method thereof

An integrated circuit is provided. The integrated circuit includes a first cell that has a first height and is arranged in a first row which extends in a first direction; a second cell that has a second height and is arranged in a second row which extends in the first direction and is adjacent to the first row, wherein the second cell is adjacent to the first cell in a second direction perpendicular to the first direction; and a power line that extends in the first direction, is arranged on a boundary between the first cell and the second cell, and is configured to supply power to the first cell and the second cell. The first cell overlaps a first width of the power line along the second direction and the second cell overlaps a second width of the power line along the second direction, and the first width and the second width are different from each other.

Integrated circuit including asymmetric power line and method of designing the same

A semiconductor device includes a substrate having a plurality of active patterns. A plurality of gate electrodes intersects the plurality of active patterns. An active contact is electrically connected to the active patterns. A plurality of vias includes a first regular via and a first dummy via. A plurality of interconnection lines is disposed on the vias. The plurality of interconnection lines includes a first interconnection line disposed on both the first regular via and the first dummy via. The first interconnection line is electrically connected to the active contact through the first regular via. Each of the vias includes a via body portion and a via barrier portion covering a bottom surface and sidewalls of the via body portion. Each of the interconnection lines includes an interconnection line body portion and an interconnection line barrier portion covering a bottom surface and sidewalls of the interconnection line body portion.

Semiconductor device including a field effect transistor

A semiconductor device is provided. The semiconductor device includes first and second logic cells adjacent to each other on a substrate, and a mixed separation structure extending in a first direction between the first and second logic cells. Each logic cell includes first and second active fins that protrude from the substrate, the first and second active fins extending in a second direction intersecting the first direction and being spaced apart from each other in the first direction, and gate electrodes extending in the first direction and spanning the first and second active fins, and having a gate pitch. The mixed separation structure includes a first separation structure separating the first active fin of the first logic cell from the first active fin of the second logic cell; and a second separation structure on the first separation structure. A width of the first separation structure is greater than the gate pitch.

Semiconductor device

Provided is a display apparatus including a display panel, a light-emitting assembly disposed behind the display panel and including a light-emitting diode (LED) configured to emit light in a rear direction, and a reflective assembly disposed behind the light-emitting assembly and configured to reflect light emitted from the light-emitting assembly toward the display panel, wherein the reflective assembly includes a first area corresponding to the LED, and a second area adjacent to the first area, wherein at least one of a diffusion amount and a reflection amount of light exiting the second area is different from a corresponding one of a diffusion amount and a reflection amount of light exiting the first area.

Display apparatus

A semiconductor device including: a conductor disposed on a substrate; a first contact disposed on the conductor; a second contact having a first portion disposed on the first contact and a second portion protruded away from the first portion in a direction parallel to the substrate, wherein the first and second contacts are disposed in an insulating layer; a via disposed on the insulating layer and the second portion of the second contact; and a metal line disposed on the via.

Semiconductor device including a gate electrode and a conductive structure

A semiconductor device is provided. The semiconductor device includes first and second logic cells adjacent to each other on a substrate, and a mixed separation structure extending in a first direction between the first and second logic cells. Each logic cell includes first and second active patterns that extend in a second direction intersecting the first direction and that are spaced apart from each other in the first direction, and gate electrodes extending in the first direction and spanning the first and second active patterns, and having a gate pitch. The mixed separation structure includes a first separation structure separating the first active pattern of the first logic cell from the first active pattern of the second logic cell; and a second separation structure on the first separation structure. A width of the first separation structure is greater than the gate pitch.

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Seongnam-si, South Korea

Jonghoon Jung