Samsung Electronics Co., Ltd.

Lg Electronics Inc.

Seoul National University

Lg Display Co., Ltd.

University of Pennsylvania

Korea Institute of Science and Technology

New Power Plasma Co., Ltd.

Jongho Lee

Un-Byoung Kang

Ju-Il Choi

Yongkwan Lee

Yeongkwon Ko

Geumjong Bae

Young Kun Jee

Youngsoo Kim

Jinwoo Park

Sanghoon Lee

Sung-Dae Suk

Jeonggi Jin

Sangsoo Kim

Young Lyong Kim

Atsushi Fujisaki

Jin Ho An

Unbyoung Kang

Sunkyoung Seo

Seungyoun Kim

Hyunwoo Park

Teakhoon Lee

Juhyun Lyu

Taehun Kim

Seung Hwan Kim

Jihoon Kim

Taehoon Kim

Nae-in Lee

Seokhyun Lee

Ingyu Yang

Junyoung Park

Kyung Suk Oh

Hyunki Kim

Hyuekjae Lee

Kookjeong Seo

Ryosuke Tani

Hyunsu Hwang

Gyuho Kang

Woojin Nam

Sangcheon Park

Sungjin Hong

Chul-yong Jang

Hwan-Sik Lim

Eunchul Ahn

Sungpil Choi

Jinkyeong Seol

Jungsoo Lim

Hee-Jeong Kim

Byeongchan Kim

Seunghwan Kim

Sangwon Kim

Jin-Woo Park

Youngjin Cho

Sanghyun Lee

Ho Young Lee

Jongho Park

Jin Young Hwang

Chulwoo Kim

Seungmin Song

Dong Il Bae

Byungchul Kim

Changkyu Choi

Sunghyun Kim

Jeahyuk Wie

Junggil Yang

Ae-Nee Jang

Wonjae Lee

Jae Moon Jo

Jin-hee Jeong

SunWon Kang

Hyeon Deuk Hwang

Joon Soo Kim

Myungsun Kim

Joonmin Park

Hae-Weon Lee

Young-lyong Kim

Hyunggil Baek

Minkyu Kim

Taewook Kim

Teak Hoon Lee

Hae-Jung Yu

Dongmyung Shin

Jaekyung Yoo

Jeongsu Han

Dae-Woo Kim

Jungsik Lee

Chul-Yong Jang

Junyoung Oh

Wan-Ku Kang

Daewook Kim

Jiwon Shin

Kyoungmok Kim

Hogeon Song

Chang-Bong Oh

Kanghyun Lee

Kijoong Kang

Sanggyu Jung

Huesup Song

Sang-sick Park

Kisup Lee

A method of generating a quantitative susceptibility mapping (QSM) map capable of reconstructing data having various resolutions using a given network trained at a specific resolution includes preparing a local field map having input resolution resol, generating a plurality of sub-images having training resolution resolby resampling the local field map, inputting each of the sub-images into QSMnet_resol, which is an inference network trained with the training resolution, acquiring a plurality of QSM sub-images having the training resolution resolfrom the inference network, generating one QSM assembled map by assembling the plurality of QSM sub-images, and generating a QSM map (corrected QSM map) from the QSM assembled map by applying a dipole compensation method.

Method for reconstructing QSM MAP using dipole compensation

A water purifier includes a water tank having a cold water path inside the tank, a coolant inside the water tank, a cooling device including an evaporator inside the water tank and through which a refrigerant flows, and a compressor that is operable to compress the refrigerant. The cooling device is configured to cool the coolant to cool water flowing through a temperature sensor, which is configured to detect a temperature of the coolant and output coolant temperature information about the detected temperature of the coolant. The purifier also includes an agitator operable to agitate the coolant and a controller configured to control the compressor and the agitator to operate simultaneously and control the agitator to stop operating while the compressor is controlled to continue operating based on preset ice-making temperature information and the coolant temperature information. There is also a method of controlling a compressor and an agitator.

Water purifier and method for controlling same

A semiconductor package comprising a substrate including substrate pads on a top surface thereof, a first upper semiconductor chip on the substrate and including conductive chip pads, and bonding wires coupled to the substrate pads and the first upper semiconductor chip. The bonding wires include first and second bonding wires. The substrate has a first region between the conductive chip pads and the substrate pads, and a second region between the first region and the substrate pads. The second bonding wire has a maximum vertical level on the first region of the substrate. On the first region of the substrate, the first bonding wire is at a level higher than that of the second bonding wire. On the second region of the substrate, the second bonding wire is at a level higher than that of the first bonding wire.

Semiconductor package

A cooking device including a frame that defines a cooking chamber, a burner cover provided in the frame to form a combustion chamber and includes an opening for flowing air, a burner provided inside the combustion chamber, and a barrier member provided between the burner cover and the frame in order to prevent heat of air discharged from the combustion chamber from being delivered to the frame.

Cooking device

A semiconductor package includes a package substrate, an interposer provided on the package substrate, a plurality of semiconductor devices on the interposer to be spaced apart from each other, the semiconductor devices being electrically connected to the package substrate through the interposer, and a molding layer on the interposer covering the semiconductor devices and exposing upper surfaces of the semiconductor devices, the molding layer including at least one groove extending in one direction between the semiconductor devices, the groove having a predetermined depth from an upper surface of the molding layer.

Semiconductor package and method of manufacturing semiconductor package

A water purifier including a raw water flow path, a first valve provided in a water purification path, a second valve provided in a wash water flow path, a purified water valve provided in a purified water supply tube, a flow sensor provided in a cooking water supply tube and sensing a flow amount of liquid flowing in the cooking water supply tube, a drainage valve provided in a drainage flow path branched from the cooking water supply tube and a controller for draining the liquid remaining in the cooking water supply tube, when a flow amount value sensed by the flow sensor for a preset period of time is less than or equal to a certain value, by controlling opening/closing of the purified water valve, the first valve, the second valve, and the drainage valve.

Water purifier and method for controlling water purifier

A semiconductor package includes a first connection structure, a first semiconductor chip on an upper surface of the first connection structure, a first molding layer on the upper surface of the first connection structure and surrounding the first semiconductor chip, a first bond pad on the first semiconductor chip, a first bond insulation layer on the first semiconductor chip and the first molding layer and surrounding the first bond pad, a second bond pad directly contacting the first bond pad, a second bond insulation layer surrounding the second bond pad; and a second semiconductor chip on the second bond pad and the second bond insulation layer.

Packaged multi-chip semiconductor devices and methods of fabricating same

A semiconductor package including a redistribution substrate including an insulating layer and redistribution patterns in the insulating layer may be provided. Each of the redistribution patterns may include a via portion, a pad portion vertically overlapping the via portion, and a line portion extending from the pad portion. The via portion, the pad portion, and the line portion may be connected to each other to form a single object. A level of a bottom surface of the pad portion may be lower than a level of a bottom surface of the line portion. A width of the line portion may have a largest value at a level between a top surface of the line portion and the bottom surface of the line portion.

Disclosed is a semiconductor package with increased thermal radiation efficiency, which includes: a first die having signal and dummy regions and including first vias in the signal region, a second die on the first die and including second vias in the signal region, first die pads on a top surface of the first die and coupled to the first vias, first connection terminals on the first die pads which couple the second vias to the first vias, second die pads in the dummy region and on the top surface of the first die, and second connection terminals on the second die pads and electrically insulated from the first vias and the second vias. Each of the second die pads has a rectangular planar shape whose major axis is provided along a direction that leads away from the signal region.

Semiconductor package with increased thermal radiation efficiency

A blender includes a main body provided with a motor assembly, a container detachably mounted on the main body and having an opened upper surface to form a space in which food is received, a blade mounted at a bottom surface of the container to crush food by rotation, a main lid shielding the opened upper surface of the container and formed with a through-hole which is opened to communicate with the inside of the container, an auxiliary lid inserted into the through-hole and configured to open and close the through-hole, and an air vent formed between the auxiliary lid and an inner surface of the through-hole to discharge the air inside the container to the outside, where an inlet and an outlet of the air vent are disposed on different vertical extension lines with respect to a bottom surface of the auxiliary lid.

Blender and container for blender

A filter device includes a case, an external filter disposed inside the case to filter substances introduced into the case and configured to be movable with respect to the case, and an internal filter disposed inside the external filter to filter the substances introduced into the case and configured to be movable with respect to the external filter.

Filter device and washing machine having same

A semiconductor package includes a lower substrate including a central region and an edge region, an upper substrate on the central region of the lower substrate, a first semiconductor chip on the upper substrate, a second semiconductor chip on the upper substrate and horizontally spaced apart from the first semiconductor chip, a reinforcing structure on the edge region of the lower substrate, and a molding layer that covers an inner sidewall of the reinforcing structure, a top surface of the lower substrate, a sidewall of the first semiconductor chip, a sidewall of the second semiconductor chip, and the upper substrate. The molding layer is interposed between the lower substrate and the upper substrate, between the upper substrate and the first semiconductor chip, and between the upper substrate and the second semiconductor chip. The first semiconductor chip is of a different type from the second semiconductor chip.

Semiconductor package and method of fabricating the same

Semiconductor devices are provided. A semiconductor device includes an insulating layer and a conductive element in the insulating layer. The semiconductor device includes a first barrier pattern in contact with a surface of the conductive element and a surface of the insulating layer. The semiconductor device includes a second barrier pattern on the first barrier pattern. Moreover, the semiconductor device includes a metal pattern on the second barrier pattern. Related semiconductor packages are also provided.

Semiconductor devices and semiconductor packages including the same

A method of manufacture for a semiconductor package includes; forming a molding member on side surfaces of the semiconductor chips, using an adhesive to attach a carrier substrate to upper surfaces of the molding member and the semiconductor chips, using a first blade having a first blade-width to cut away selected portions of the carrier substrate and portions of the adhesive underlying the selected portions of the carrier substrate, and using the first blade to partially cut into an upper surface of the molding member to form a first cutting groove, wherein the selected portions of the carrier substrate are dispose above portions of the molding member between adjacent ones of semiconductor chips, using a second blade having a second blade-width narrower than the first blade-width to cut through a lower surface of the molding member to form a second cutting groove, wherein a combination of the first cutting groove and the second cutting groove separate a package structure including a semiconductor chip supported by a cut portion of the carrier substrate and bonding the package structure to an upper surface of a package substrate.

Semiconductor package and method of manufacture

A package structure includes a lower substrate, substrate connection terminals on the lower substrate, a semiconductor package on the substrate connection terminals, the semiconductor package including a package substrate and a first encapsulant covering the package substrate, first underfills between the lower substrate and the semiconductor package, the first underfills covering corner portions of the semiconductor package, as viewed in a plan view, and covering at least one of the substrate connection terminals, and a second underfill between the lower substrate and the semiconductor package, the second underfill covering a side surface of the semiconductor package in a plan view.

Package structures having underfills

Growing community of inventors

Seoul, South Korea

Jongho Lee