Samsung Electronics Co., Ltd.

Jong-Yeon Kim

Tae-Je Cho

Un-Byoung Kang

Yun-Hyeok Im

Sung-Min Hwang

Kyoung-Hoon Kim

Wonseok Cho

Young Woo Park

Jintaek Park

Woonkyung Lee

Tae-Hong Min

Jae-Joo Shim

Hoosung Cho

Jung Dal Choi

Chang Seok Kang

Yeong-kwon Ko

Ju Hyung Kim

Provided are a bump structure includes a first bump and a second bump, a semiconductor package including the same, and a method of manufacturing the same. The bump structure includes: first bump provided on a connection pad of a substrate, the first bump including a plurality of nano-wires extending from the connection pad and a body connecting end portions of the plurality of nano-wires; and a second bump provided on the body of the first bump.

Bump structure including nano-wires and a body connecting ends of the nano-wires, semiconductor package having the bump structure and method of manufacturing the semiconductor package

Three-dimensional semiconductor devices may be provided. The devices may include a stack-structure including gate patterns and an insulation pattern. The stack-structure may further include a first portion and a second portion, and the second portion of the stack-structure may have a narrower width than the first portion. The devices may also include an active pattern that penetrates the stack-structure. The devices may further include a common source region adjacent the stack-structure. The devices may additionally include a strapping contact plug on the common source region.

Three-dimensional semiconductor devices

Semiconductor packages are disclosed. A semiconductor package includes: a first chip that includes a chip region and scribe regions at edges of the chip region, wherein the chip region comprises integrated circuit units and main through substrate vias electrically connected to the integrated circuit units; and a second chip that is bonded onto the first chip. The semiconductor package includes dummy conductive connectors including at least dummy wiring lines, the dummy conductive connectors electrically connected to the main through substrate vias at one end, and not capable of forming an electrical connection at the other end.

Semiconductor package

A flash memory device provided here comprises a user data area storing user data; and a security data area storing security data. The security data area stores a security data pattern in which first groups of memory cells storing security data are arranged respectively between second groups of memory cells storing dummy data.

Flash memory device and memory system comprising same

Growing community of inventors

Suwon-si, South Korea

Jong-Yeon Kim