Samsung Electronics Co., Ltd.

Jong-Un Kim

Sang-Il Han

Dong-Hyun Kim

Yoo-Sang Hwang

Hyun-Woo Chung

Hyun-Seung Song

Ho-in Ryu

Jun-Soo Kim

Hyeon-Kyu Lee

A semiconductor memory device including a substrate, a first element isolation film pattern, and a second element isolation film pattern. The substrate includes a first region and a second region. The first element isolation film pattern is in the first region and corresponds to a first active region. The second element isolation film pattern is in the second region and corresponds to a second active region. The first element isolation film pattern includes a first material and the second element isolation film pattern includes a second material different from the first material.

Semiconductor memory device and method of fabricating the same

Provided is a semiconductor device, including a substrate including a device isolation layer and an active region isolated by the device isolation layer; a trench in the active region; a gate electrode filling at least a portion of the trench; a recess in the substrate at one side of the gate electrode, the recess overlapping a portion of the device isolation layer and the active region; and a lower contact plug filling the recess.

Semiconductor device

Methods of fabricating semiconductor devices are provided including providing a substrate having a first region and a second region, the substrate defining trenches in the first and second regions; forming active fins on the first and second regions, the active fins protruding from the trenches in the first and second regions; forming spacers on sidewalls of the active fins in the first and second regions; recessing floors of the trenches under the spacers to provide extensions of the active fins; implanting impurities of a first type in the extensions of the active fins in the first region; and implanting impurities of a second, type, different from the first type, in the extensions of the active fins in the second region.

Methods of fabricating semiconductor devices having punch-through stopping regions

A semiconductor memory device includes a substrate including cell block, a balancing block, and a sense block. A plurality of cell bit lines are formed in the cell block of. A plurality of cell plugs are formed adjacent to side surfaces of the bit lines. Cell inner spacers, air spacers, and cell outer spacers are formed between the cell bit lines and the cell plugs. A plurality of balancing bit lines are formed in the balancing block. A plurality of balancing plugs are formed adjacent to side surfaces of the balancing bit lines. Balancing inner spacers and balancing outer spacers are formed between the balancing bit lines and the balancing plugs. The balancing bit lines and at least some of the cell bit lines are connected to the sense block.

Semiconductor devices having balancing capacitor and methods of forming the same

In a method of manufacturing a semiconductor device, a mask is formed on a substrate. The substrate is divided into a first region and a second region. An upper portion of the substrate in the first region is partially removed using the mask as an etching mask to form a recess. A first gate structure is formed in the recess. A portion of the mask in the first region is removed. A blocking layer pattern is formed on the substrate in the first region over the first gate structure.

Growing community of inventors

Seoul, South Korea

Jong-Un Kim