Electronics and Telecommunications Research Institute

Jong-Sun Lyu

Sung-Weon Kang

Jin-Hyo Lee

Kyu-Hong Lee

Won-Gu Kang

Yeo-Whan Kim

A bipolar transistor and a process for manufacturing thereof is disclosed. The bipolar transistor has a self-aligned base electrode in which first and second pillars are formed within first and second trenches which act as an activated region and a collector region, respectively; a conductive impurities layer of high density formed at a bottom side of the first and second trenches and at a lower portion of an isolation wall between the first and second trenches; and a sequentially formed base and emitter layer. After connection to the base layer, a base contact electrode is formed within the first trench, and a collector contact electrode is formed by implanting second conductive impurities in the second pillar.

Bipolar transistor having a self-aligned base electrode and method for

A metal oxide semiconductor device with a self-aligned groove channel structure is disclosed comprising a substrate in which a first channel region of a first conductivity type and source and drain regions of a second conductivity type are formed, a first gate insulating layer formed on the first channel region, and a first gate electrode formed on the gate insulating layer, a second gate electrode having a self-aligned groove structure formed at both sides of the first gate electrode; a second gate insulating layer formed between the substrate and the second gate insulating layer; and a non-planar second channel region of the first conductivity type formed under the second gate insulating layer and doped with a different concentration of an impurity from the first channel region. The groove structure prevents an electric field produced in the vicinity of a drain from penetrating into the channel region to lessen a short channel effect. The length of an effective channel is increased by the groove structure, and also a junction depth of source/drain regions can be further increased by a depth of the groove in comparison with the conventional MOS device. The source/drain resistance is lowered, and reliability is increased due to lessening the effect of a junction spike of a metallization and/or an electro-migration.

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Daejeon, South Korea

Jong-Sun Lyu