Lx Semicon Co., Ltd.

Korea Institute of Science and Technology

Sogang University Research Business Development Foundation

Other

Silicon Works Co., Ltd.

Osong Medical Innovation Foundation, Korea University Research and Business Foundation

Nhn Corporation

Jong Suk Lee

Seok Jae Oh

Young Bok Kim

Ju Ho Shin

Yeh Ju Ka

Chung Hwan Son

Heseong An

Won Hee Kim

Jung-Hyun Lee

Seung Sang Hwang

Jin Won Lee

Albert Sung Soo Lee

Jeong Geol Na

Byung Keun Oh

Kie Yong Cho

Munsuk Seong

Hyun Jung Yu

Sunghwan Park

He Seong An

Oh Kyong Kwon

Soon Bum Kwon

Sang Wan Kim

Tae Han Kim

Sang Hee Park

Sanghyup Lee

Jung Moon Kim

Seockheon Lee

Jung Kook Kim

Jong In Yook

Soek Jae Oh

Kyung Lang Park

Jae Gyoon Hahm

Soo Yeun Lee

Wan Suk Choi

Shin Dug Kim

Kwang Won Koh

Hyung Woo Park

Disclosed are a clock phase converter and a phase converting method that can generate a converted clock signal with a desired amount of delay by selecting and outputting an output signal corresponding to a preset value among output signals of a plurality of delayed clock signal generators that detect the transition of a clock signal and generate delayed clock signals by sequentially delaying the clock signal by a certain period of time.

Clock phase converter and phase converting method

A clock data recovery circuit of a display suitable for recovering a clock from a clock data signal. The clock data recovery circuit includes a clock recovery circuit configured to delay an input clock through delay units of multiple stages, and output delayed clocks from the delay units, respectively; and a data recovery circuit configured to recover data of a clock data signal using a recovered clock selected among the delayed clocks.

Clock data recovery circuit of display and clock recovery circuit thereof

A hybrid crosslinked polymeric membrane and a process for fabricating the same are provided. Specifically, the hybrid crosslinked polymer membrane comprises a glassy polymer and a ladder-structured polysilsesquioxane and has a crosslinked structure. The hybrid crosslinked polymer membrane can have an excellent permeability of carbon dioxide by virtue of an increase in the free volume and enhanced plasticization resistance, chemical resistance, and durability.

Hybrid crosslinked polymer membrane

Disclosed herein is a method of controlling a display driving apparatus configured to operate a display device that displays an image. The method includes receiving a first image signal (RGB) from an external system, converting the first image signal (RGB) into a second image signal (RGB') in a format processable by a data driver, outputting the second image signal (RGB′), converting the second image signal (RGB′) into a source signal based on a data control signal generated by a timing controller, converting heat energy generated by the data driver into a voltage, calculating a temperature of the data driver based on the converted voltage, and changing a resistance for impedance matching between the timing controller and the data driver based on the calculated temperature.

Display driving apparatus for operating display device that displays image and control method therefor

A polymer blend membrane includes a polyether-based copolymer and a polyether polymerized in situ and has high permeability and high selectivity for carbon dioxide. In the polymer blend membrane, the free volume of the polyether-based copolymer is greatly increased, and the adsorption capacity for carbon dioxide is enhanced. Thus, it can have excellent mechanical properties and excellent permeability and selectivity for carbon dioxide.

Highly Co2-permeable and selective polymer blend membrane and process for preparing the same

Highly CO-permeable and selective polymer blend membrane and process for preparing the same

The present disclosure discloses a clock recovery circuit for a display, which recovers a clock from a clock data signal. The clock recovery circuit includes a clock recoverer configured to generate delayed clocks using a multi-stage delay chain including delay units; and a delay compensator configured to control a first delay time of a first delay unit to be the same as a second delay time of remaining delay units. The clock recovery circuit may compensate for a difference in delay time between the first delay time and the second delay time.

Clock recovery circuit for display

There is disclosed a display driving device configured to drive a display device for displaying an image, including a source driver integrated circuit (IC) configured to convert image data into a source signal, and an energy harvesting device configured to convert thermal energy into electrical energy and supply the electrical energy to the source driver IC, wherein the energy harvesting device includes a thermal energy converter configured to convert thermal energy generated in the source driver IC to output an energy harvesting current, and an energy storage directly connected to the thermal energy converter, and configured to receive the energy harvesting current, store power, and output a first auxiliary voltage that is a voltage generated due to the stored power, wherein the thermal energy converter and the energy storage are located on the source driver IC.

Display driving device and display driving method for reducing power using energy harvesting device

The present disclosure discloses a clock and data recovery circuit. The clock and data recovery circuit may include a clock recovery unit configured to output a recovery clock signal by operating a first time-to-digital conversion circuit or a second time-to-digital conversion circuit depending on a phase difference between a clock of an input signal and the recovery clock signal, and a data recovery unit configured to sample data from the input signal and output recovery data.

Clock and data recovery circuit and source driver including the same

The present invention relates to nanoparticles including a crystal structure-controlled zeolitic imidazolate framework (ZIF) and a method of producing the same. Nanoparticles according to the present invention comprise: metal ions; and an organic ligand coupled to the metal ions, wherein the organic ligand includes an imidazolate-based organic ligand and an alkylamine-based organic ligand.

Crystal structure-modulated zeolitic imidazolate framework nanoparticles and method of producing the same

The present disclosure discloses a digital loop filter in an all-digital phase-locked loop. The digital loop filter may include a selection circuit configured to output one of a first data signal and a second data signal as valid data, a first operation circuit configured to output a first operation signal by adding or subtracting the valid data and a first register signal, a first register circuit configured to register the first operation signal and output the first operation signal as the first register signal, a second operation circuit configured to output a second operation signal by adding or subtracting a value of at least one bit of the valid data and the first register signal, and a second register circuit configured to store the second operation signal and output the second operation signal as a control signal.

Digital loop filter in all-digital phase-locked loop

The present disclosure discloses a time-to-digital conversion circuit for a clock and data recovery circuit. The time-to-digital conversion circuit may include a first time-to-digital conversion circuit enabled when a phase difference between a clock of an input signal and a recovery clock signal is greater than a reference phase difference and configured to output a first digital signal corresponding to the phase difference, and a second time-to-digital conversion circuit enabled when the phase difference is equal to or smaller than the reference phase difference and configured to output a second digital signal corresponding to the phase difference.

Time-to-digital conversion circuit and source driver including the same

The present disclosure discloses an all-digital phase-locked loop. The all-digital phase-locked loop may include a time-to-digital conversion circuit configured to convert phase differences between a reference signal and a feedback signal into respective digital values and to output a first data signal and a second data signal corresponding to the respective digital values, a digital loop filter configured to select one of the first data signal and the second data signal as valid data and output a control signal by operating the valid data and a first register signal, a digitally controlled oscillator configured to generate an oscillation signal and control a frequency of the oscillation signal in response to the control signal, and a divider configured to divide the oscillation signal and output the feedback signal to the time-to-digital conversion circuit.

All-digital phase-locked loop

The present invention relates to a hybrid membrane mixed with nanoparticles including a zeolitic imidazolate framework (ZIF), and a gas separation method using the same. A hybrid membrane according to the present invention comprises a polymer matrix, and nanoparticles which are dispersed in the polymer matrix and include the ZIF.

Hybrid membrane comprising zeolitic imidazolate framework nanoparticles and method of gas separation using the same

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Seoul, South Korea

Jong Suk Lee