Samsung Electronics Co., Ltd.

Jong-shik Yoon

Yoon-Hae Kim

Hwa-Sung Rhee

Hyun-Jo Kim

Jong-Mil Youn

Jae-yup Chung

Young-Gun Ko

Hee-Don Jeong

Byung-Sung Kim

Ho-Jun Kim

Je-min Yoo

Chul-Hong Park

Hong-Seong Kang

Dong-Kyun Sohn

Hae-Wang Lee

Kyu-man Cha

An integrated circuit (IC) device includes a fin-type active region formed in a substrate, a step insulation layer on at least one sidewall of the fin-type active region, and a first high-level isolation layer on the at least one sidewall of the fin-type active region. The fin-type active region protrudes from the substrate and extending in a first direction parallel to a main surface of the substrate, includes a channel region having a first conductivity type, and includes the stepped portion. The step insulation layer contacts the stepped portion of the fin-type active region. The step insulation layer is between the first high-level isolation layer and the at least one sidewall of the fin-type active region. The first high-level isolation layer extends in a second direction that is different from the first direction.

Integrated circuit device and method of manufacturing the same

Provided are method of fabricating semiconductor device and computing system for implementing the method. The method of fabricating a semiconductor device includes forming a target layer, forming a first mask on the target layer to expose a first region, subsequently forming a second mask on the target layer to expose a second region separated from the first region in a first direction, subsequently forming a third mask in the exposed first region to divide the first region into a first sub region and a second sub region separated from each other in a second direction intersecting the first direction, and etching the target layer using the first through third masks such that the first and second sub regions and the second region are defined in the target layer.

Method of fabricating semiconductor device and computing system for implementing the method

Semiconductor devices, and a method for fabricating the same, include an interlayer dielectric film pattern over a substrate, a first wiring within the interlayer dielectric film pattern and having a first length in a first direction, a second wiring within the interlayer dielectric film pattern and separated from the first wiring, and a spacer contacting the first wiring and the second wiring. The spacer electrically separates the first wiring and the second wiring from each other. The second wiring has a second length different from the first length in the first direction.

Semiconductor devices having contacts with intervening spacers and method for fabricating the same

A semiconductor device includes a substrate having a transistor area, a gate structure disposed on the transistor area of the substrate, a first interlayer insulating layer covering the gate structure, a blocking pattern disposed on the first interlayer insulating layer, and a jumper pattern disposed on the blocking pattern. The jumper pattern includes jumper contact plugs vertically penetrating the first interlayer insulating layer to be in contact with the substrate exposed at both sides of the gate structure, and a jumper section configured to electrically connect the jumper contact plugs.

Semiconductor device having jumper pattern and blocking pattern

Semiconductor devices are provided. The semiconductor devices may include an active pattern and a insulation layer. The semiconductor devices may include a gate that is on the active pattern and that includes a first material, and a dummy gate that is on the insulation layer and that includes a second material different from the first material.

Semiconductor devices including gates and dummy gates of different materials

Semiconductor devices, and a method of manufacturing the same, include a gate insulating film pattern over a semiconductor substrate. A gate electrode is formed over the gate insulating film pattern. A spacer structure is formed on at least one side of the gate electrode and the gate insulating film pattern. The spacer structure includes a first insulating film spacer contacting the gate insulating film pattern, and a second insulating film spacer on an outer side of the first insulating film spacer. The semiconductor device has an air gap between the first insulating film spacer and the second insulating film spacer.

Growing community of inventors

Yongin-si, South Korea

Jong-shik Yoon