Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Jong-Seon Kim

Seung-Woo Lee

Su-Hyun Kwon

Man-Bok Cheon

Tae-Sung Kim

Chang-yeong Kim

Heui-keun Choh

Ki-Joon Kim

Haeng-Won Park

Jae-Suk Yu

Myung-ryul Choi

Jun-Hyung Souk

Yong-Yun Park

Min-Hwa Jang

Min-Seok Song

Yun-Ju Yu

Doo-Sik Park

In-Shig Shim

Young-Wha Oh

Jac-Youl Lee

A timing controller that includes a noise detection circuit and a setting control unit. The noise detection circuit includes a detection unit and a reset signal generating unit. The detection unit outputs a detection signal having a first logic level based on at least one of a plurality of reference data toggling asynchronous with a clock signal. The reset signal generating unit outputs a reset signal having a second logic level based on the detection signal. The setting control unit stores setting data and initializes the setting data in response to the reset signal having the first logic level, and the setting data are used to process red, green and blue (RGB) image data.

Timing controller and a display device including the same

A liquid crystal display includes a liquid crystal display panel for displaying picture images, and a color correction unit. Upon receipt of raw RGB picture data corresponding to raw RGB gamma curves, the color correction unit generates corrected RGB picture data based on values over a predetermined imaginative gamma curve established in accordance with the characteristic of the liquid crystal display panel. The color correction unit stores values over corrected RGB gamma curves corresponding to the corrected picture data, and gamma-corrects the raw RGB picture data based on values over the stored corrected RGB gamma curves, thereby displaying the picture images.

Color correction liquid crystal display and method of driving same

An LCD for improving dynamic contrast by adjusting gamma voltages according to the brightness of an image is provided. The LCD includes: a liquid crystal display panel assembly having a plurality of pixels provided on crossing areas of a plurality of gate lines and a plurality of data lines; a gate driver applying voltage signals for sequentially scanning the gate lines; a source driver applying voltage signals for image display to the data lines; a timing controller providing image data and a control signal for the source driver, providing a gate line on/off control signal for the gate driver, and outputting digital gamma data to a digital/analogue (D/A) converter; and the D/A converter connected to the timing controller for converting the digital gamma data from the timing controller into analog signals to generate a plurality of gamma voltages and outputting the gamma voltages to the source driver. The LCD generates the gamma voltages by the D/A converter in place of using serially-connected resistors, and thus, the gamma voltages may vary depending on the brightness of the image.

Liquid crystal display for improving dynamic contrast and a method for generating gamma voltages for the liquid crystal display

The present invention relates to a digital data transceiver circuit applicable to a flat panel display such as an LCD to be placed between graphic signal generation module and liquid crystal display module or between timing control IC and data driver IC, etc. A digital data transceiver circuit of the present invention has a first current source and a second current source, and the second current source is controlled to supply a current or not depending on the status of the lower bit of input data. A transmitter is connected to a node, on which the first and second current sources combine, and the transmission paths of currents from the two current sources are determined depending on the status of the upper bit of input data. A signal of the transmitter is transmitted through a transmission line, and a termination resistor is connected to the transmission line. A receiver detects output data according to a voltage applied to the termination resistor. The digital data transceiver circuit of the present invention can transmit 2-bit or 3-bit data during one clock period, and it is resistible to the noise better than the voltage transmission method and effective to long distance transmission.

Flat panel display including transceiver circuit for digital interface

A display driving circuit includes a first interface unit, a signal discriminating circuit, a signal distributing circuit, a driver logic circuit and a synchronization processing unit. The first interface unit receives a first signal through a first interface from a host. The signal discriminating circuit discriminates whether the first signal corresponds to a first video signal or a second video signal. The signal distributing circuit divides the first signal into the first and second video signals based on a discrimination result of the signal discriminating circuit. The driver logic circuit drives a first display panel based on the first video signal. The second interface unit converts the second video signal into a second signal and provides the second signal through a second interface to an external display device. The synchronization processing unit receives a synchronization signal from the external display device and provides the synchronization signal to the host.

Display driving circuit, display device, display system and method of driving display devices

A low voltage differential signaling transceiver includes a transmitter and a receiver, the transmitter having a first terminal in signal communication with a transmission line, a source resistance in signal communication with the first terminal, a switch in signal communication with the source resistance and in switchable signal communication from ground or an input voltage, a voltage regulator in switchable signal communication with the switch for providing the input voltage to the switch, and a voltage controller in signal communication between the first terminal and the voltage regulator for controlling the input voltage to provide a controlled voltage to a receiver; and the receiver having an amplifier having a first input, a first pad in signal communication with the first input, a load resistance, and a second pad in signal communication with the load resistance, where the first and second pads are both in signal communication with one end of a first transmission line.

Low voltage differential signaling transceiver

A liquid crystal display includes a signal controller having a luminance controller receiving image data from an external graphic source and controlling the luminance of the image data such that the luminance at the gray expressed by a specific data value of the image data is established to be 80 cd/m, and a gamma converter outputting image data each having a gamma characteristic adapted to a gamma 2.2 curve. The gamma converter output is determined without using a look up table based on at least one difference curve having a linear portion, a quartic portion, and a critical value where the liner portion and the quartic portion intersect. The liquid crystal display further includes a data driver receiving the image data for selecting and outputting gray voltages corresponding to the image data, and an inverter controlling a lamp to emit light with a luminance of 80 cd/mor more.

Liquid crystal display and driving method thereof

An LCD module includes a user connector part that receives power voltages, image signals and control signals from an external host system and outputs the power voltages, image and control signals through a first integrated type connector and an LCD module having a second integrated type connector connected with the first integrated type connector through an FPC. The LCD module receives power voltages and image and control signals through the second integrated type connector, provides image data signals and timing signals to data lines and provides scan signals to gate lines. Namely, the LCD can receive power voltage, the image signals and control signals through the integrated type connector instead of a plurality of connecting terminals, thereby providing an LCD having slim weight and compact size and reducing the size thereof.

Liquid crystal display module and liquid crystal display apparatus having the same

Disclosed is a flat panel display and a drive method thereof. The flat panel display comprises a flat panel including a signal wire arrangement for transmitting image drive signals to pixels, a row signal wire arrangement for transmitting scanning signals, and a column signal wire arrangement for transmitting image signals; a master drive output unit, the master drive output unit generating output signals for driving pixels and supplying the output signals to a corresponding signal wire arrangement; and an slave drive unit, the slave drive unit supplying compensation signals to the signal wire arrangement before the output signals of the master drive output unit are charged to thereby enable the easy charging of the output signals of the master drive output unit. The drive method comprises the steps of supplying and charging compensation signals by the slave drive unit, the compensation signals being supplied to a corresponding signal wire arrangement before the output signals of the master drive output unit are charged to thereby enable the easy charging of the output signals of the master drive output unit; and supplying output signals for the driving of pixels by the master drive output unit following the supply of the compensation signals.

Flat panel display and drive method thereof

Disclosed is a driving apparatus of a flat panel display. The apparatus comprises a signal processing device for outputting display data, gray scale voltages, a gate On/Off voltage, a source control signal and a gate control signal with a driving data, a driving control signal, and a driving power source; a main source driver IC for generating and outputting a source signal; a main gate driver IC for generating and outputting a gate signal; a display panel for displaying an image; a source feedback unit arranged along a row direction of the display panel that is opposite said main source driver IC, for detecting distorted amount of a source signal output from a pixel placed at the last row of a source line connected to the main source driver IC and feeding back a first compensation signal corresponding to the distorted amount of the source signal to the pixel at the last column; and a gate feedback unit arranged along a column direction of the display panel that is opposite said main gate driver IC, for detecting distorted amount of a gate signal output from a pixel placed at the last column of a gate line connected to the main gate driver IC and feeding back a second compensation signal corresponding to the distorted amount of the gate signal to the pixel at the last row.

Driving apparatus of a flat panel display

An error detection circuit and method for detecting errors in data using a cyclic redundancy code which includes a plurality of first EXCLUSIVE OR gates each of which receives one bit of input data and one bit of a first portion of remainder data. Each first EXCLUSIVE OR gate outputs the EXCLUSIVE OR of the input data bits and the first remainder data bits to a corresponding one of a plurality of first registers to provide input data to the registers such that the registers store the result of the EXCLUSIVE OR operation. Each of a plurality of second EXCLUSIVE OR gates receives the output of a corresponding one of the plurality of first registers and receives one bit of a second portion of remainder data. Each second EXCLUSIVE OR outputs the EXCLUSIVE OR of these two inputs to a corresponding one of a plurality of second registers which store this second result. Each of the second registers has an output for outputing their stored value.

Growing community of inventors

Pyeongtaek, South Korea

Jong-Seon Kim