Samsung Electronics Co., Ltd.

Jong-Lae Park

Young Tae Lee

Bum Gyu Park

Choong Hoon Park

Soo Hyun Kim

Donghee Han

Youngtae Lee

Dae-yeong Lee

Choonghoon Park

Bumgyu Park

Lak-Kyung Jung

Soohyun Kim

Dong-Jin Kim

Ju-hwan Kim

Seok-Ju Yoon

Hanjun Shin

Hee-Myung Noh

Seung-Geun Lee

Young-Tae Lee

Bum-gyu Park

Dahye Choi

Byung-Soo Kwon

Dong-hyeon Ham

Daeyeong Lee

Byeong-Jun Lee

Hwang-Sub Lee

An operating method of a system-on-chip (SoC) which includes a processor including a first core and a dynamic voltage and frequency scaling (DVFS) module and a clock management unit (CMU) for supplying an operating clock to the first core, the operating method including: obtaining a required performance of the first core; finding available frequencies meeting the required performance; obtaining information for calculating energy consumption for each of the available frequencies; calculating the energy consumption for each of the available frequencies, based on the information; determining a frequency, which causes minimum energy consumption, from among the available frequencies as an optimal frequency; and

System-on-chip and an operating method thereof

Disclosed is an apparatus for dynamic thermal management, which includes a thermal management unit that determines whether there is a need to perform thermal management on a processor based on temperatures measured from a plurality of temperature sensors included in the processor and generates an indication signal, and a controller that performs the thermal management on the processor in response to the indication signal, by using a first method of adjusting a state of each of a plurality of cores included in the processor, a second method of adjusting a level of an operating voltage and a frequency of a clock signal, which are provided to the processor, and/or a third method for adjusting only the frequency of the clock signal to be provided to the processor, and where each of the plurality of cores is in a wake-up state or an idle state.

Apparatus and method for dynamic thermal management using frequency clamping and idle injection

A computing device and a method for operating the computing device are provided. The computing device includes a task classifying module and a task allocating and managing module. The task classifying module classifies a task scheduled to be processed by a multi-core processor into an expectable task or a normal task. The task allocating and managing module selects one core of the multi-core processor as a target core and allocates the task scheduled to be processed to the target core. In response to the task scheduled to be processed being classified as the normal task, the task allocating and managing module determines whether to allocate the normal task to the target core depending on whether the target core processes a previously allocated expectable task.

Computing device for handling tasks in a multi-core processor, and method for operating computing device

A semiconductor device is provided. The semiconductor device includes a processing device that provides resource usage information including a utilization value; and a prediction information generating device that generates resource usage prediction information based on the resource usage information and provides the resource usage prediction information to the processing device. The prediction information generating device includes: an error calculator to calculate an error value between the utilization value and a predicted value included in the resource usage prediction information; a margin value calculator to receive the error value from the error calculator and calculate a margin value using the error value; an anchor value calculator to calculate an anchor value using the utilization value; and a predictor to output the predicted value using the anchor value and the margin value. The processing device controls resource allocation of the processing device based on the resource usage prediction information.

Semiconductor device and prediction method for resource usage in semiconductor device

A scheduling method includes calculating required performance for a given task, calculating use performance and real performance of a candidate processor, calculating power corresponding to the real performance, calculating expected energy usage of the candidate processor based on the required performance, the use performance, the real performance, and the calculated power and calculating performance efficiency of the candidate processor by considering a ratio of the expected energy usage to the real performance.

Scheduling tasks based on calculated processor performance efficiencies

A scheduling method of a system on chip including a multi-core processor includes receiving a schedule-requested task, converting a priority assigned to the schedule-requested task into a linear priority weight, selecting a plurality of candidate cores, to which the schedule-requested task will be assigned, from among cores of the multi-core processor, calculating a preemption compare index indicating a current load state of each of the plurality of candidate cores, comparing the linear priority weight with the preemption compare index of the each of the plurality of candidate cores to generate a comparison result, and assigning the schedule-requested task to one candidate core of the plurality of candidate cores depending on the comparison result.

System on chip including a multi-core processor and task scheduling method thereof

There is provided a method of operating a computing device including a processing component based on power consumption. The method includes: obtaining power mode information about the processing component, measuring a temperature of the processing component and a current that flows through the processing component in response to the obtaining the power mode information, generating leakage power information based on the power mode information and the measured temperature and current, and storing the generated leakage power information in a memory.

Computing device and method of operating the same

Provided are multi-core control systems. A multi-core control system includes multiple cores including a first core; and a process dependency recognizer configured to recognize a dependency between processes each executed in the respective cores, wherein if the first core waits for a first period of time to execute a first process, the first core recognizes a process on which the first process depends by the process dependency recognizer.

Multi-core control system that detects process dependencies and selectively reassigns processes

A method of operating a system-on-chip (SOC) including a central processing unit (CPU) and a target hardware to which a dynamic voltage and frequency scaling (DVFS) is applied, includes determining an operating scheme of the target hardware, setting a DVFS application scheme for applying the DVFS to the target hardware, based on the operating scheme of the target hardware, and performing the DVFS on the target hardware, based on the DVFS application scheme.

Method of operating system-on-chip, system-on-chip performing the same and electronic system including the same

An application processor including at least one core, at least one first cache respectively connected to the at least one core, the at least one first cache associated with an operation of the at least one core, a second cache associated with an operation of the at least one core, the second cache having a storage capacity greater than the first cache, a cache utilization management circuit configured to generate, a power control signal for power management of the application processor based on a cache hit rate of the second cache; and a power management circuit configured to determine, a power state level of the application processor based on the power control signal and an expected idle time, the power management circuit configured to control the at least one core, the at least one first cache, and the second cache based on the power state level may be provided.

Processor, computing device including the same and method of selecting low power mode of the same

A power management device includes a workload rate detector configured to adjust a length of a duration period; a power management unit configured to calculate a period workload rate in the duration period; and a voltage-clock provider configured to adjust a power level, based on the period workload rate and/or based on an external command.

Method of dynamically scaling a power level of a microprocessor

A system-on-chip includes a symmetric multi-processor including a plurality of cores, each configured to operate in a high performance operating mode and a low performance operating mode. The system-on-chip further includes a clock management unit configured to provide an operating clock signal to the symmetric multi-processor, a state management unit configured to monitor operating states of the cores, a temperature management unit configured to monitor a temperature of the symmetric multi-processor, and a symmetric multi-processor control unit configured to determine the operating clock signal and the operating states of the cores based on a workload of the symmetric multi-processor. The symmetric multi-processor control unit is further configured to differentially determine a maximum operating clock frequency for the cores based on the temperature and the operating states of the cores, which indicate a quantity of cores that are currently in operation.

System-on-chip having a symmetric multi-processor and method of determining a maximum operating clock frequency for the same

A method of changing an operating frequency for performing a dynamic voltage and frequency scaling on a central processing unit included in a system on-chip is provided. A previous maximum peak workload of the central processing unit is detected in a history period of the dynamic voltage and frequency scaling when the operating frequency of the central processing unit is determined to be increased, and an increased operating frequency is applied to the central processing unit. The increased operating frequency is calculated based on the previous maximum peak workload of the central processing unit.

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Anyang-si, South Korea

Jong-Lae Park