Lg Semicon Co., Ltd.

Goldstar Electron Co., Ltd.

Hyundai Electronics Industries Co. Ltd.

Jong Kwan Kim

Jong Moon Choi

Seong Hyoung Park

Chang-Jae Lee

Chang Jae Lee

Jeong Hwan Son

Method for fabricating a semiconductor device, including the steps of (1) forming a gate insulating film, a silicon layer, and an insulating film on a substrate in succession, (2) selectively removing a portion of the insulating film on which a gate electrode is to be formed, (3) forming first sidewalls at sides of the insulating film having the portion removed therefrom, (4) forming silicide on a surface of the exposed silicon, (5) forming a cap insulating film on the silicide and the first sidewalls, (6) removing the insulating film, and (7) using the cap insulating film as a mask in removing the exposed silicon layer, to form the gate electrode.

Method for fabricating semiconductor device

Wells of a semiconductor device suitable for achieving high integration, and a method for forming the same are disclosed. The wells of a semiconductor device include a first conductivity type semiconductor substrate where a cell region and a periphery region are defined, a second conductivity type shield region in the entire cell region and in the entire periphery region at a depth below surface of the semiconductor substrate, a first conductivity type well on the second conductivity type shield region beneath the surface of the semiconductor substrate, a second conductivity type shield sidewall formed in the second conductivity type shield region and the first conductivity type well at border of the cell and periphery regions, a first conductivity type buried region formed at the second conductivity type shield region in the periphery region, and a second conductivity type well on the first conductivity type buried region in the first conductivity type well.

Plural wells structure in a semiconductor device

A method of forming an isolation region of a semiconductor device, includes the steps of forming a first insulating film on a substrate; defining a plurality of isolation regions on the first insulating film; removing portions of the first insulating film in the isolation regions to expose portions of the substrate; selectively removing the exposed portions of the substrate to form at least one trench; forming a second insulating film in the at least one trench and on portions of the first insulating film; and removing the first insulating film so as to remove the second insulating film formed thereon.

Method of forming isolation structure

Plural wells structure in a semiconductor device and method for forming

A structure and fabricating method of a thin film transistor which is suitable for an SRAM memory cell. The thin film transistor structure includes: an insulation substrate; a gate electrode formed on the insulation substrate; a gate insulation film formed on the gate electrode and on the insulation substrate; a semiconductor layer formed on the gate insulation film; channel regions formed in parts of the semiconductor layer at both sides of the gate electrode; a high density first conductive type first impurity region formed in the semiconductor layer over the gate electrode; and first conductive type second impurity regions of having an LDD structure formed in parts of the semiconductor layer over the insulation substrate except under the gate electrode. The method for fabricating a thin film transistor includes processes for: forming a gate electrode on an insulation substrate and forming a gate insulation film on the overall surface thereof; forming a semiconductor layer on the gate insulation film; forming diffusion preventing spacers on the semiconductor layer; forming impurity-containing spacers on the diffusion preventing spacers; diffusing impurities from the impurity-containing spacers into the semiconductor layer; and injecting high density source/drain ions into the semiconductor layer with the insulation film side walls used as masks.

Method of making a thin film transistor

An improved twin well formation method for a semiconductor device capable of improving the latch-up characteristic in DRAM device which requires a high integration density and of improving a recess problem which occurs due to the capacitor, which includes the steps of a first step which forms an insulation film on a semiconductor substrate having a first region and a second region; a second step which forms a first temporary film on an insulation film of the first region; a third step which forms a first side wall spacer at the first temporary side wall; a fourth step which implants a first conductive ion to a substrate of a second region; a fifth step which forms a second temporary film on a substrate of the second region; a sixth step which removes the first temporary film; a seventh step which implants a second conductive ion to a substrate of the first region; and an eighth step which anneals and removes the second temporary film and the first insulation spacer.

Method for forming twin well

A method for forming wells of a semiconductor device, being capable of removing the topology between n- and p-well regions. The method of the present invention provides a twin well structure wherein the n-well region has a higher level than the p-well region. This method includes the steps of sequentially forming a buffering film and an oxidizable film over a semiconductor substrate, forming an anti-oxidation film over the oxidizable film, removing a portion of the anti-oxidation film disposed at a first well region of the semiconductor substrate, implanting impurity ions in the first well region of the semiconductor substrate and annealing the resulting structure, thereby forming a first well in the substrate, removing the anti-oxide film and the oxidizable film both disposed at a second well region of the substrate, and implanting impurity ions in the second well region of the semiconductor substrate and annealing the resulting structure, thereby forming a second well in the substrate.

Method for forming wells of semiconductor device

A structure and fabrication method for a thin film transistor which is suitable for an SRAM memory cell. The thin film transistor structure includes an insulating substrate and a semiconductor layer formed as a wall on the insulation substrate. A gate insulation film is formed on the semiconductor layer and over the entire surface of the insulation substrate. A gate electrode formed on the gate insulation film at the center part of the semiconductor layer. Impurity regions are formed in the semiconductor layer on both sides of the gate electrode.

Growing community of inventors

Chungcheongbuk-do, South Korea

Jong Kwan Kim