Samsung Electronics Co., Ltd.

Jong Ki Jung

Jin Wook Lee

Kwan Heum Lee

Kwang Yong Yang

Byeong Chan Lee

Yoon Hae Kim

Myung Il Kang

Jae Hun Jeong

Myung Ii Kang

Chan Geun Ahn

Soo Hun Hong

Yoon Seok Lee

A semiconductor device includes a first fin type pattern in a first region of a substrate. The first fin type pattern includes a plurality of spaced-apart fins having respective sidewalls defined by a first trench. A first gate structure is provided, which intersects the first fin type pattern. A second fin type pattern is provided in a second region of a substrate. The second fin type pattern includes a fin having a sidewall defined by a second trench. A second gate structure is provided, which intersects the second fin type pattern. A field insulating film fills at least a part of the first trench and at least a part of the second trench. The field insulating film has a first upper surface, which is in contact with at least one sidewall of the first fin type pattern and is spaced from a bottom of the first trench by a first height, and a second upper surface, which in contact with the sidewall of the second fin type pattern and is spaced from a bottom of the second trench by a second height different from the first height.

Semiconductor devices with fin-shaped active regions and methods of fabricating same

A semiconductor device includes a substrate having a first region and a second region, a plurality of first gate structures in the first region, the first gate structures being spaced apart from each other by a first distance, a plurality of second gate structures in the second region, the second gate structures being spaced apart from each other by a second distance, a first spacer on sidewalls of the first gate structures, a dielectric layer on the first spacer, a second spacer on sidewalls of the second gate structures, and a third spacer on the second spacer.

Semiconductor devices having multiple gate structures and methods of manufacturing such devices

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Hwaseong-si, South Korea

Jong Ki Jung