Invensense, Inc.

Crocus Technology Inc.

Jong Il Shin

Jongwoo Shin

Peter Smeys

Daesung Lee

Martin Lim

Dafna Beery

Bongsang Kim

Jason S Reid

Fang Liu

Stephen Lloyd

Jean Pierre Nozieres

Olivier Joubert

Provided herein is an apparatus including a cavity in a first side of a first silicon wafer, and an oxide layer on the first side and in the cavity. A first side of a second silicon wafer is bonded to the first side of the first silicon wafer. A gap control structure is on a second side of the second silicon wafer, and a MEMS structure in the second silicon wafer. A eutectic bond is bonding the second side of the second silicon wafer to a third silicon wafer. A lower cavity is between the second side of the silicon wafer and the third silicon wafer, wherein the gap control structure is outside of the lower cavity and the eutectic bond.

MEMS gap control structures

An apparatus includes a cavity within a substrate. A MEMS structure is within the cavity, wherein the cavity includes the MEMS structure. A trench is connected to the cavity, wherein the trench is not directly opposite the MEMS structure. An oxide layer lines the trench and the cavity. A seal layer seals the trench and traps a predetermined pressure within the cavity and the trench.

Dual cavity pressure structures

An integrated MEMS device comprises two substrates where the first and second substrates are coupled together and have two enclosures there between. One of the first and second substrates includes an outgassing source layer and an outgassing barrier layer to adjust pressure within the two enclosures. The method includes depositing and patterning an outgassing source layer and a first outgassing barrier layer on the substrate, resulting in two cross-sections. In one of the two cross-sections a top surface of the outgassing source layer is not covered by the outgassing barrier layer and in the other of the two cross-sections the outgassing source layer is encapsulated in the outgassing barrier layer. The method also includes depositing conformally a second outgassing barrier layer and etching the second outgassing barrier layer such that a spacer of the second outgassing barrier layer is left on sidewalls of the outgassing source layer.

CMOS-MEMS integrated device including multiple cavities at different controlled pressures and methods of manufacture

Provided herein is a method including bonding a first oxide layer on a handle substrate to a second oxide layer on a complementary metal oxide semiconductor ('CMOS'), wherein the fusion bonding forms a unified oxide layer including a diaphragm overlying a cavity on the CMOS. The handle substrate is removed leaving the unified oxide layer. A piezoelectric film stack is deposited over the unified oxide layer. Vias are formed in the piezoelectric film stack and the unified oxide layer. An electrical contact layer is deposited, wherein the electrical contact layer electrically connects the piezoelectric film stack to an electrode on the CMOS.

Integration of AIN ultrasonic transducer on a CMOS substrate using fusion bonding process

A MEMS device is disclosed. The MEMS device includes a first substrate. At least one structure is formed within the first substrate. The first substrate includes at least one first conductive pad thereon. The MEMS device also includes a second substrate. The second substrate includes a passivation layer. The passivation layer includes a plurality of layers. A top layer of the plurality of layers comprises an outgassing barrier layer. At least one second conductive pad and at least one electrode are coupled to the top layer. At least one first conductive pad is coupled to the at least one second conductive pad.

MEMS-CMOS device that minimizes outgassing and methods of manufacture

A method and system for forming a MEMS device are disclosed. In a first aspect, the method comprises providing a conductive material over at least a portion of a top metal layer of a base substrate, patterning the conductive material and the at least a portion of the top metal layer, and bonding the conductive material with a device layer of a MEMS substrate via metal silicide formation. In a second aspect, the MEMS device comprises a MEMS substrate, wherein the MEMS substrate includes a handle layer, a device layer, and an insulating layer in between. The MEMS device further comprises a base substrate, wherein the base substrate includes a top metal layer and a conductive material over at least a portion of the top metal layer, wherein the conductive material is bonded with the device layer via metal silicide formation.

CMOS-MEMS integration using metal silicide formation

Methods for bonding two wafers are disclosed. In one aspect, a first wafer includes an integrated circuit and the second wafer including a MEMS device. The method comprises depositing a bond pad on a metal on the first wafer and sequentially bonding the first wafer to the second wafer utilizing first and second temperatures. The second wafer is bonded to the bond pad at the first temperature and the bond pad and the metal are bonded at the second temperature. In another aspect, a first wafer including an integrated circuit, the second wafer includes a MEMS device. The method comprises depositing a bond pad on a metal on one of the first wafer and the second wafer and bonding the first wafer to the second wafer at a first temperature via a direct bond interface. The method includes bonding the bond pad to the metal at a second temperature.

CMOS-MEMS integration by sequential bonding method

Provided herein is a method including forming a trench in a handle substrate, and a trench lining is formed in the trench. A first cavity and a second cavity are formed in the handle substrate, wherein the first cavity is connected to the trench. A first MEMS structure and the handle substrate are sealed for maintaining a first pressure within the trench and the first cavity. A second MEMS structure and the handle substrate are sealed for maintaining the first pressure within the second cavity. A portion of the trench lining is exposed, and the first pressure is changed to a second pressure within the first cavity. The first cavity and the trench are sealed to maintain the second pressure within the trench and the first cavity.

A method for forming a MEMS device is disclosed. The MEMS device includes a MEMS substrate and a base substrate. The MEMS substrate, where includes a handle layer, a device layer and an insulating layer in between. The method includes the sequential steps of: providing a standoff on the device layer; etching a via through the device layer and the insulating layer; providing a contact layer within the via, wherein the contact layer provides electrical connection between the device layer and the handle layer; providing a bonding layer on the standoff; and bonding the bonding layer to pads on the base substrate.

CMOS-MEMS integrated device including a contact layer and methods of manufacture

Various embodiments provide for a method for roughening a surface of a MEMs device or the surface of a CMOS surface. A first material can be deposited in a thin layer over a surface made of a second material. After heating, the first and second materials, they can partially melt and interdiffuse, forming an alloy. The first material can then be removed and the alloy is removed at the same time. The surface of the second material that is left behind has then been roughened due to the interdiffusion of the first and second materials.

Film induced interface roughening and method of producing the same

A device with a magnetic sensor includes a substrate with a device layer. A magnetic sensor is formed on the device layer and includes a first permanent magnet. The first permanent magnet has at least one alternating ferromagnetic (FM) layer and antiferromagnetic (AFM) layer, with a barrier layer disposed between the FM layer and the AFM layer. The first permanent magnet is magnetized in a first direction at a temperature higher than a blocking temperature of the AFM layer. A plurality of device pads are coupled to the magnetic sensor. An integrated circuit substrate with a plurality of IC pads, wherein the plurality of device pads are selectively eutectic bonded to the plurality of IC pads at a bonding temperature greater than the blocking temperature of the AFM layer of the first permanent magnet.

Device with magnetic sensors with permanent magnets

A method and system for a device with a magnetic sensor includes a first permanent magnet and a second permanent magnet. The first permanent magnet and the second permanent magnet of the magnetic sensor have at least one alternating ferromagnetic (FM) layer and antiferromagnetic (AFM) layer. The first permanent magnet is magnetized in a first direction and the second permanent magnet is magnetized in a second direction which is substantially orthogonal to the first direction. The blocking temperature of the AFM layer of the first permanent magnet is higher than the blocking temperature of the AFM layer of the second permanent magnet.

Magnetic sensors with permanent magnets magnetized in different directions

A method and system for a device with a magnetic sensor element and magnetic storage elements is disclosed. The device includes an integrated circuit substrate. At least a magnetic sensor with a magnetic sensor element with a permanent magnet is disposed over the integrated circuit substrate. A plurality of magnetic storage elements, each with at least one permanent magnet is disposed over the integrated circuit substrate.

Growing community of inventors

San Jose, CA, United States of America

Jong Il Shin