Skhynix Inc.

Hyundai Motor Company

Lg Electronics Inc.

Mando Corporation

Amotech Co., Ltd.

Kia Corporation

Samhongsa Co., Ltd.

Samsung Electronics Co., Ltd.

Lg Philips Lcd Co., Inc.

Kookmin University

Kia Motors Corporation

Otis Elevator Company

Jong Hoon Lee

Kyu Hyuk Jeong

Byoung Kyu Kim

Se Chun Park

Sang Won Lee

Jae Yeong Lee

Young Jin Shin

Kwang Ho Baek

Jung Shik Kim

Seung Chan Heo

Chang Wook Park

Sang Hoon Moon

Tae Wan Park

Chang Seob Song

Woong Chan Chae

In Sik Hwang

Byung Kwan Son

Jay Il Jeong

Li-Hsiang Sun

Jae Yeon Kim

Ju Ho Lee

Sang Jun Park

Jeong Hee Lee

Won Sik Kim

Seong Jin Park

Jung Woo Lee

Ji Hwan Kim

Sangwon Lee

Young Chul Kim

Il Hwan Kim

Joo Hee Lee

In Ki Jeon

Myeong Lo Lee

Kwang Keun Kim

Gyu Sik Lim

Jin Haeng Lee

Woo Joo Kim

Sun Hee Koo

Woo Seong Kim

Jong Hak Jin

Keun Seuk Oh

Jong Woo Nam

Wonyong Yoon

Hong Man Chang

Ju Ryong Kim

Muryong Kim

Kwangil Kim

Jin Su Oh

Han Shin Chung

Min Soo Oh

Nam Hun Lee

Byung Sung Min

Seung Joon Jun

In Kyung Kim

Haesoo Kim

Jung Hun Shin

Seung Jin Heo

A motor includes a rotor and a stator, in which the rotor includes: a rotor core including a plurality of core portions disposed on a rotation shaft along an axial direction of the rotor, wherein the rotor core includes a core flow path through which a cooling fluid passes through each core portion; and a cooling plate which is inserted between the two divided core portions so that both surfaces are joined to the two neighboring core portions, and a distribution flow path that distributes the cooling fluid supplied from a cooling flow path of the rotation shaft into the core flow path of the two neighboring core portions is provided between at least one of the two neighboring core portions and the cooling plate.

Motor having cooling flow path

A memory device includes a plurality of memory cells programmed to a first program state through a plurality of program loops, a page buffer configured to perform a verify operation of verifying the first program state in each of the plurality of program loops, and control logic configured to, as the plurality of program loops are sequentially performed, adjust a first evaluation time of a first evaluation operation so as to decrease the difference between a second evaluation time of a second evaluation operation and the first evaluation time.

Memory device related to a verify operation and method of operating the memory device

Provided herein may be a memory device and a method of operating the same. The memory device may include a plurality of memory cells, a peripheral circuit configured to perform a verify operation that identifies threshold voltages of the plurality of memory cells by using a first verify voltage and a second verify voltage, and a program operation controller configured to control the peripheral circuit, after the verify operation is terminated and during a period in which a program voltage is applied to the plurality of memory cells, to apply a first control signal to a page buffer that is coupled to a first memory cell having a threshold voltage that is higher than the first verify voltage and lower than the second verify voltage, and apply a second control signal having a lower level voltage than the first control signal to the page buffer.

Memory device and method of operating the same

In a driving system, first and second inverters are connected to a driving motor, one end of a stator winding through which 3-phase current flows is connected to an output line of the first inverter, and the other end of the stator winding is connected to an output line of the second inverter. A winding pattern of the driving motor includes: coils wound in slots defined in the stator and to which 3-phase current is applied; coils wound on innermost and outermost sides based on a direction toward a rotating shaft of the driving motor in the slots, and being energized by different AC phases; and coils disposed between a first coil located on the outermost side and a second coil located on the innermost side, and being energized by the same AC phases as those of the first and second coils.

Winding pattern of a motor and a motor driving system

A motor winding pattern is provided. In a driving system in which a first inverter and a second inverter are connected to a drive motor, and one end of a stator winding through which a three phase currents flow is connected to an output line of the first inverter, and the other end of the stator winding is connected to an output line of the second inverter, coils to which three phase currents are applied are wound on slots defined in a stator of the drive motor, and coils to which alternating current phases different from each other are applied are wound inside and outside each of all the slots defined in the stator on the basis of direction toward a rotation axis of the drive motor.

Motor winding pattern and motor driving system

The memory device may include a plurality of memory cells, a peripheral circuit, and a control logic. The peripheral circuit may perform a program operation on the plurality of memory cells and may perform program verify operations each including at least one verify loop corresponding to a plurality of program states programmed in the program operation. The control logic may control the peripheral circuit to perform a verify pulse apply operation and an additional verify pulse apply operation when a target verify loop count exceeds a reference count corresponding to the target program state, and may determine a failure of the program verify operation corresponding to the target program state based on results of the verify pulse apply operation and the additional verify pulse apply operation. A verify voltage of the additional verify pulse apply operation is higher than a verify voltage of the verify pulse apply operation.

Memory device performing verify operation and method of operating the same

A semiconductor memory device includes a memory cell array, a peripheral circuit, a current sensing circuit, and control logic. The memory cell array includes a plurality of memory cells. The peripheral circuit performs a program operation on selected memory cells connected to a selected word line among the plurality of memory cells. The current sensing circuit generates a pass signal or a fail signal by performing a current sensing operation on the selected memory cells. The control logic receives the pass signal or the fail signal and controls an operation of the peripheral circuit and the current sensing circuit. The control logic controls the current sensing circuit and the peripheral circuit to perform the current sensing operation and an operation of applying a program pulse to the selected word line based on a program progress state of the selected memory cells.

Semiconductor memory device and method of operating the semiconductor memory device

A memory device includes a cell string, a peripheral circuit and a control logic. The cell string includes a select transistor and a plurality of memory cells, and further includes a plurality of dummy cells, wherein the plurality of dummy cells are coupled in series between the select transistor and the plurality of memory cells. The peripheral circuit configured to perform a dummy program operation on the plurality of dummy cells. The control logic configured to control the peripheral circuit so that the plurality of dummy cells have different threshold voltage distributions during the dummy program operation.

Memory device for performing dummy program operation and operating method thereof

A memory device, in accordance with a method of operation, may include: a plurality of pages coupled to a common word line and configured to be sequentially selected by different select lines; a program operation controller configured to perform a program operation on a first page that is to be programmed first, among the plurality of pages; and a start loop manager configured to generate start loop information about a program loop in which program verification corresponding to each of a plurality of program states to be formed by threshold voltages of memory cells included in the first page starts, during the program operation on the first page. The program operation controller is further configured to perform a program operation on a second page to be programmed subsequent to the first page, among the plurality of pages, based on the start loop information.

A method and apparatus for detecting a failure of a current sensor measuring the magnitude of a current, by which a motor is driven. A required current calculator calculates a phase and a magnitude of a current required for a motor, in accordance with a torque required for the motor. An estimated current calculator calculates an estimated current, in accordance with the phase and the magnitude of the required current. A failure detector detects a failure of a current sensor by comparing the estimated current with a current measured by the current sensor.

Method and apparatus for detecting failure of current sensor of motor

A steering apparatus, a steering method, and a steering control device. A steering motor includes a first winding and a second winding respectively receiving three-phase power. A first steering controller controls the power supplied to the first winding. A second steering controller controls the power supplied to the second winding. A detector detects whether or not a phase among three phases corresponding to each of the first and second windings is open; and a controller. If the phase among the three phases is detected to be open, the controller controls one steering controller corresponding to the open phase, among the first steering controller and the second steering controller, in accordance with an angular velocity of a steering wheel and the rotational speed of the steering motor, so that the steering motor generates additional torque.

Steering apparatus, steering method, and steering control device

A rack-assist-type electric power steering apparatus may include: a motor pulley provided on or coupled to a shaft of a motor; a nut pulley provided on or coupled to an outer circumferential surface of a ball nut coupled to a rack bar via a ball; a belt coupled to the motor pulley and the nut pulley, the belt comprising provided with one or more first magnetic bodies; and a rack housing enclosing or housing at least a portion of the motor pulley, the nut pulley and the belt are housed. The rack housing may comprise one or more second magnetic bodies provided on an inner circumferential surface thereof facing or opposite to the belt. Alternatively, the rack housing may comprise a support portion protruding from an inner surface of the rack housing, and one or more second magnetic bodies may be provided on a surface of the support portion.

Rack-assist-type electric power steering apparatus

The present disclosure relates to a memory device and a memory system including the same. The memory device includes a memory cell storing data, a voltage generation circuit selectively outputting a program voltage and verify voltages in response to an operation control signal, a page buffer including first latches and second latches, and storing first data sensed by a first sensing current in the first latches and second data sensed by a sensing current greater than the first sensing current in the second latches during a verify operation using the verify voltages, and a pass/fail check circuit determining a pass or fail of the verify operation of the memory cell according to the first data and allowable bits.

Memory device, memory system including the memory device

The disclosure provides an apparatus and method of compensating for a torque of a motor. The apparatus includes a torque information collector configured to collect steering information, motor position information, and predetermined motor information, a torque ripple calculator configured to determine a target torque based on the steering information and to determine a compensation torque for torque ripple based on the target torque and the motor information, a compensation current calculator configured to determine a compensation current value based on the motor information and the compensation torque, a current value generator configured to convert the target torque into a target current value and to generate an output current value based on the target current value and the compensation current value, and a current signal output configured to output a current control signal corresponding to the output current value.

Apparatus and method of compensating for steering torque of driving motor

A method of operating a memory device having improved threshold voltage distributions of select transistors, the memory device including a plurality of cell strings each including a plurality of source select transistors, a plurality of memory cells, and a plurality of drain select transistors stacked in a vertical direction to a substrate include performing a first program operation to program at least one source select transistor coupled to a first source select line adjacent to a common source line, among the plurality of source select transistors, using a fixed program voltage, and performing a second program operation to program at least one source select transistor coupled to a second source select line adjacent to the first source select line, among the plurality of source select transistors, using an incremental step pulse program (ISPP) method after the first program operation is completed.

Memory device having plurality of memory cell strings, plurality of source select transistors and plurality of drain select transistors and method of operating a memory device having improved threshold voltage distributions of select transistors

Growing community of inventors

Incheon, South Korea

Jong Hoon Lee