Skhynix Inc.

Hynix Semiconductor Inc.

Samsung Electro-mechanics Co., Ltd.

Samsung Display Co., Ltd.

Cj Corporation

Cheiljedang Corp.

Lg Display Co., Ltd.

Samsung Electronics Co., Ltd.

Lg Electronics Inc.

Korea Food Research Institute

Other

Lg Innotek Co., Ltd.

Korea University Research and Business Foundation

Cj Cheiljedang Corporation

Jong Hoon Kim

Ji Young Noh

Il Hwan Cho

Seung Taek Yang

Ki Jun Sung

Jeong Ki Kim

Seung Hyun Lee

Hyung Joon Kim

Ki Bum Kim

Young Hoon Kim

Hyeong Seok Choi

Jong Ho Lee

Ji Young Kim

Seong Cheol Kim

Kang Heon Hur

Sang Jin Park

Bok Kyu Choi

Ji Hong Jo

Yong Jong Park

Dae Won Kim

Sung Min Kim

Tae Yong Lee

Young Ho Kim

Hyung Chul Ryu

Sang Wook Park

Sung Hak Jung

Myeong Yun Chae

Hyun Jung Park

Min Suk Suh

Han Jun Bae

Jee Woong Lim

Jea Heon Ahn

Hyung Ok Chun

Kyu Jeong Yeon

Young Mee Chung

Dong Hyun Ko

Sung Hak Lee

Jang Il Kim

Seok Joon Hong

Dae Bok Oh

Hwa Yeul Oh

Tac Keun Oh

Ji Seong Yang

Chul Sang Jang

Young Geun Yoo

Sung Bae Song

Chan Sun Hyun

Ho Seon Rew

Kwon Whan Han

Chang Jun Park

Tae Min Kang

Ho Young Son

Sang Bum Sohn

Jang Soo Kim

Je Hak Kim

Hae Tak Jin

Myoung Jong Lee

Eun Hye Do

Chan Woo Jeong

Seong Yeon Lee

Yoon Sook Kim

Jeong Hwan Lee

Woo June Kwon

Do Hoon Lee

Dong Hoon Kim

Dong Hwan Kim

Young Jun Kim

Eun Young Lee

Jin Woo Lee

Young Min Lee

Kyoung Jin Cha

Seon Uk Lee

Min Gon Lee

Hyung Soon Kwon

Sun Young Kim

Jong Hee Hwang

Woo Yung Jung

Sung Man Kim

Ki Yong Lee

Duk-Sung Kim

In Jae Chung

Woong Il Choi

Deuk Su Lee

Yong Sik Youn

Seung Yeop Lee

Sung Hak Jo

Byung Soo Kim

Dae Woong Lee

Hong Seok Kim

Ha Na Lee

Kyung Jae Lee

Young Sik Lee

Jin Woo Park

Sung Kyu Kim

Un Jeong Kim

Mi Seon Lee

Kwang Hyuk Lee

Wan Choon Park

Byoung Do Lee

Gyu Jei Lee

Frame for crutches

Example memory controllers are disclosed. An example memory controller may include a PHY module including a first PHY terminal connected to a plurality of pins of a device connector, a MAC module including a first MAC terminal that is enabled to form a first lane with the first PHY terminal, and a second MAC terminal that is disabled without being connected to the first PHY terminal, a switch controller configured to receive a signal of a host connector connected to the device connector from at least one of the plurality of pins and output a switch signal in response to the signal of the host connector, and a switch configured to disable the second MAC terminal and form the first lane by connecting the first PHY terminal to the first MAC terminal in response to the switch signal.

Memory controller, method of operating memory controller and storage device

A display device is provided. A display device including a plurality of light-output areas through which incident light is emitted and a light-blocking area which blocks the incident light, the display device includes a substrate, a bank layer which is disposed in the light-blocking area on the substrate and defines a plurality of openings, each of which is disposed in one of the plurality of light-output areas, and a color control pattern disposed in the opening of the bank layer, wherein the bank layer includes a first bank area which has a first thickness and defines the plurality of openings and a second bank area which is disposed between the plurality of openings and has a second thickness smaller than the first thickness.

Display device

There are provided a semiconductor and a method of fabricating the same. The semiconductor device may include a second semiconductor substrate directly bonded to a first semiconductor substrate. The first semiconductor substrate may include a first through via with an end portion protruding through a first top surface, the first top surface being a top surface of a first semiconductor substrate body, a liner extending to partially expose a side surface of the end portion of the first through via, and a first diffusion barrier layer. The liner may include a third top surface that is positioned at a lower height than a second top surface, the second top surface being a top surface of the end portion of the first through via and substantially equal to the first top surface. Alternatively, the liner may include a third surface positioned at a height that is lower than the second top surface and higher than the first top surface.

Semiconductor devices including substrates bonded to each other and methods for fabricating the same

A display device includes a first display substrate including a light emitting element which emits light of a first color or light of a second color different from the first color, a second display substrate including in order toward the first display substrate, a layer including both a bank layer defining an opening and a wavelength control pattern in the opening, a capping layer covering the wavelength control pattern and the bank layer, and a color absorbing layer which corresponds to the bank layer and blocks the light of the first color and the light of the second color. The capping layer includes a first area corresponding to the color absorbing layer, the bank layer includes a second area corresponding to the color absorbing layer, and the first area of the capping layer is between the color absorbing layer and the second area of the bank layer.

Display device including color absorbing layer between capping and bank layers for improving color matching, and method of providing the same

A display device is provided. An embodiment of a display device includes a first substrate, a second substrate disposed on the first substrate, first and second partition walls disposed on the second substrate, the second partition wall being disposed outside the first partition wall, a first trench disposed inside the first partition wall and having a first width, a second trench disposed between the first and second partition walls and having a second width greater than the first width; an alignment key disposed to overlap the second trench; a first spacer disposed on the alignment key, and a sealing member disposed along an edge between the first substrate and the second substrate without overlapping the alignment key, wherein the first spacer partially overlaps the first partition wall, the second partition wall, and the sealing member.

Method of fabricating display device capable of facilitating substrate bonding with alignment key

A display device includes a first substrate including a first emission area emitting light of a first color, a second emission area emitting light of a second color having a peak wavelength shorter than a peak wavelength of light of the first color, and a light blocking area which blocks light; a color filter layer disposed on a surface of the first substrate; and a wavelength control layer disposed on the color filter layer and including a bank layer and a wavelength control structure. The bank layer is disposed in the light blocking area on the color filter layer. The wavelength control structure is disposed in a first opening and the second opening of the bank layer. The first opening, the second opening, and the bank hole are spaced apart from each other. The bank hole surrounds an edge of the first opening.

A semiconductor package includes: semiconductor chips being offset-stacked to expose edge regions adjacent to first side surfaces; chip pads disposed in each of the edge regions of the semiconductor chips, the chip pads including a plurality of first chip pads arranged in a first column and a plurality of second chip pads arranged in a second column; a horizontal common interconnector having one end connected to the second chip pad of a semiconductor chip of the semiconductor chips, and another end connected to the first chip pad of another semiconductor chip; and a vertical common interconnector having one end connected to the second chip pad of the uppermost semiconductor chip, which is electrically connected to the first chip pad of the uppermost semiconductor chip connected to the horizontal common interconnector.

Semiconductor package including stacked semiconductor chips

A capacitor component includes a body including a dielectric layer and internal electrode layers, with the dielectric layer interposed therebetween; and an external electrode disposed on the body and connected to the internal electrode layers. Each of the internal electrode layers has a capacitance formation portion disposed to overlap an adjacent internal electrode layer, and a lead-out portion extending from the capacitance formation portion and connected to the external electrode. A ratio (H2/H1) of a height difference H2 to a height difference H1 is 0.2 or less, where the height difference H2 is a height difference between the capacitance formation portion and the lead-out portion of a lowermost internal electrode layer the height difference H1 is a height difference between the capacitance formation portion and the lead-out portion of an uppermost internal electrode layer. An average thickness of the dielectric layer is 420 nm or less.

Capacitor component

A semiconductor die bonding structure includes a lower die including a lower top bonding dielectric layer and a lower connection structure and an upper die stacked over the lower die and including an upper bottom bonding dielectric layer and an upper connection structure. The lower top bonding dielectric layer and the upper bottom bonding dielectric layer are connected. The lower connection structure and the upper connection structure are connected.

Semiconductor die bonding structure

Display device capable of facilitating substrate bonding with alignment key and method of fabricating the same

A semiconductor package includes a package substrate, a plurality of memory stacks, at least one processor chip and one or more heat dissipation structures. The memory stacks are disposed on the package substrate. The memory stacks are spaced apart from each other by a predetermined distance. The processor chip is disposed on the memory stacks to be partially overlapped with each of the memory stacks. The heat dissipation structure is disposed on the upper surfaces of the memory stacks.

Semiconductor package having a three-dimensional stack structure

The present invention relates to a composition or cell therapeutic agent for preventing or treating liver fibrosis, containing an exosome or exosome-derived ribonucleic acid. The exosome or ribonucleic acid derived therefrom, of the present invention, has effects of inhibiting activities of hepatic stellate cells and Kupffer cells and reducing the expression of &#x3b1;-SMA and inhibits the progression of liver fibrosis by inhibiting the deposition of collagen, thereby being effectively usable as a cell therapeutic agent for the prevention or treatment of liver fibrosis.

Composition for preventing or treating liver fibrosis, containing exosome or exosome-derived ribonucleic acid

Growing community of inventors

Suwon-si, South Korea

Jong Hoon Kim