Hyundai Electronics Industries Co. Ltd.

Jong Hong Bae

Mun Weon Ahn

Se Kyoung Hong

Tae Hun Jin

A chip verification method by comparing internal state traces of chips having various functions, which is capable of reducing the overall chip designing and verifying time and attaining a more exact verification. The chip verification method in a chip design stage includes a first step of executing an application program for each of a target system having a target chip and a system having a function verification chip model of a design stage, using a virtual system modeled by a hardware description language; a second step of storing an internal state of the target chip on a command-by-command basis during execution of the application program and generating a trace file; a third step of comparing the internal state of the target chip stored at the trace file and an internal state of the function verification chip model on a command-by-command basis; and a fourth step of continuing execution of the program if the respective internal states are the same from the above comparison result, and if different, outputting the internal state and ending execution.

Verification method by means of comparing internal state traces

An analog-to-digital converter is provided. The analog-to-digital converter capable of increasing the processing speed of the converter by using a number of SAR registers. The analog-to-digital converter, includes: a storage circuit for storing a first, a second and a third digital signals, respectively; a controller for controlling conversions of two bits contained in one of the digital signals stored at the storing means in response to a first, a second and a third comparing signals; a circuit, having a first, a second and a third digital-to-analog converters, for converting the first, the second and the third digital signals by using each of the digital-to-analog converters to provide a first, a second and a third analog reference signals; and a comparator for comparing each of the analog reference signals to an analog input signal which is to be converted, to provide said first, said second and said third comparing signals, and having a first, a second and a third comparators each of which performs each of the comparisons.

Apparatus and a method for analog to digital conversion using plural reference signals and comparators

To provide a branch prediction apparatus and its method that accesses BTB using IP of an instruction whose interval between the branch instruction is the smallest, on the basis of a branch instruction's fetch among the instructions that can be fetched prior to one cycle, and also that fetches the branch target after N cycle, after BTB accessing, storing the information of the cycle interval N1 between the branch access instruction and branch instruction inside BTB entry.

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Kyoungki-do, South Korea

Jong Hong Bae