Samsung Electronics Co., Ltd.

Jong Ho Roh

Kyoung Man Kim

Eun Ji Kang

Sung-Min Hong

Jae Geun Yun

Joon-Woo Cho

Hoon Mo Yang

Min-Woo Song

Sun Hee Park

Yong-Bae Song

Bong Il Park

Kee Moon Chun

Jong Hyup Lee

Ho June Leu

Sung-Jin Cho

Dong Han Lee

Byung Tak Lee

Byoung Jin Ahn

Hong Mi Choi

A portable electronic device comprises a double-sided display including a first display side and a second display side formed on a side opposite the first display side; a direct memory access (DMA) controller configured to read first image data from a memory; at least one sensor configured to detect at least one of a position change of the double-sided display and a movement of a user's pupil and to output a detection signal; a status signal generator configured to interpret the detection signal output and to output a status signal; a transmission order determiner configured to receive the first image data from the DMA controller, to determine a transmission order of the first image data based on the status signal, and to output second image data corresponding to the determined transmission order; and a display driver integrated circuit (IC) configured to transmit the second image data to the display.

Application processor for determining data transmission order based on position of display and devices including the same

A display system is provided. The display system includes a perframe controller configured to receive a frame synchronization signal and to change values of M and N in synchronization with at least one pulse of the frame synchronization signal, where M and N are natural numbers; and a fractional divider configured to generate and output a pixel clock signal by dividing an input clock signal by a division ratio of N/M.

Display system

A system on chip (SoC) for transmitting data packets to a display driver integrated circuit (IC) controlling a plurality of displays is provided. The SoC includes a first register, and a central processing unit (CPU) configured to set first values in the first register to adjust a frame rate of each of the displays. A tearing effect (TE) signal detection circuit is configured to detect a TE signal output from the display driver IC. A data transmission circuit is configured to generate a plurality of frame rate adjustment signals using the detected TE signal and the first values and to control transmission timings of the data packets transmitted to the displays using the frame rate adjustment signals.

Host and multi-display system including the same

A system on chip (SoC) includes a display controller configured to receive data of a current frame and to determine whether the data of the current frame has been updated from data of a previous frame, and a transmitter configured to output a panel self-refresh (PSR) inactive command and the data of the current frame when the display controller determines that the data of the current frame has been updated and to transmit a panel self-refresh (PSR) active command when the display controller determines that the data of the current frame has not been updated.

System on chip, operation method of the same, and mobile device including the same

A display controller includes a synchronization signal adjusting circuit, which adjusts at least one of the delay and the pulse width of a synchronization signal generated in a display driver and outputs an adjusted synchronization signal, and a transmission timing control circuit configured to control the transmission timing of display data, which will be transmitted to the display driver, in response to the adjusted synchronization signal.

Devices and method of adjusting synchronization signal preventing tearing and flicker

In one example embodiment, a method of operating an image data processing circuit which controls an operation of an organic light-emitting diode (OLED) display includes transforming at least one first RGB value into at least one luminance value and at least one chroma value. The method further includes adjusting the at least one luminance value and the at least one chroma value based on at least one first control value. The method further includes generating at least one second RGB value based on the at least one adjusted luminance value and the at least one adjusted chroma value. The method further includes outputting the second RGB values to the OLED display.

Methods and devices for controlling operations of an organic light-emitting diode display

Provided are an interconnect, a bus system with interconnect, and bus system operating method. The bus system includes a master, slaves access by the master, and an interconnect. The interconnect connects the master with the slaves in response to selection bits identified in a master address provided by the master.

Interconnect, bus system with interconnect and bus system operating method

The display controller includes a decoder, a control circuit, and a video output logic circuit. The decoder is configured to decode a first display command and output a decoding signal and first synchronizing information indicating the first display command is received. The control circuit is configured to generate a first control signal based on second synchronizing information and the decoding signal. The second synchronizing information is output from a second display controller and indicates a second display command is received. The video output logic circuit is configured to send a part of video data stored in a video source and a plurality of first timing control signals for displaying the part of the video data on a display to the display based on the first control signal.

Display controller, method for operating the display controller, and display system having the display controller

A camera module includes an image sensor configured to convert an optical signal received through a lens into an electrical signal and generate full-size image data, an image signal processing unit configured to calibrate and output the full-size image data, a first memory unit configured to periodically receive and store the full-size image data from the image signal processing unit, a scaling unit configured to scale down the full-size image data received from the first memory unit and periodically output scaled-down image data to a display device, and an encoder configured to receive the full-size image data stored in the first memory unit, convert it into a compressed file in a predetermined format, and output the compressed file upon opening of a shutter.

Camera module for reducing shutter delay, camera including the same, and method of driving the same

A device includes a plurality of display modules configured to commonly receive a stream of video data from a controller and a video control masking unit. Each display module includes a display device. The video control masking unit receives one or more control signals that indicate how the video data is to be displayed by the display modules, and further receives at least one of: a clock signal for clocking the stream of video data that is provided in common to the plurality of display modules, and a data enable signal for enabling the display modules to process the video data; and in response thereto the video control masking unit masks at least one of the clock signal and the data enable signal to generate a plurality of masked signals each corresponding to one of the display modules, and provides each of the masked signals to the corresponding display module.

Method and device for driving a plurality of display devices

A scaler is provided and includes filters each receiving input pixel data and scaling the input pixel data using a scaling factor to generate a scaled pixel value, and a plurality of mixers, less than the plurality of filters. A first mixer performs a first blending operation on a first scaled pixel value and a second scaled pixel value provided by different filters. A second mixer performs a second blending operation on the blended result of the first mixer and a third scaled pixel value provided by anther filter.

Method for processing image and devices using the method

An image processor for combining video data and graphic data is provided. The image processor includes a scaler that is configured to scale compressed graphic data in a horizontal direction using bilinear scaling, to scale a horizontally scaled graphic data in a vertical direction using line copy, and to process a data value of a pixel at a border of a vertically scaled graphic data based on a data value of the compressed graphic data and a data combiner that is configured to combine video data with processed graphic data output from the scaler.

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Yongin-si, South Korea

Jong Ho Roh