Samsung Display Co., Ltd.

Hyundai Motor Company

Kia Motors Corporation

Kia Corporation

Samsung Displayco., Ltd.

Jong Hee Kim

Chong Chul Chai

Jae Keun Lim

Young Wan Seo

Ji-Sun Kim

Bo Yong Chung

Ji Hye Lee

Ji Sun Kim

Jun Hyun Park

Hyun Joon Kim

Il-Joo Kim

Yeong-Keun Kwon

Soo-wan Yoon

Yang Hwa Choi

Sang-Uk Lim

Soo Yeon Lee

Tak Young Lee

Chang-Soo Lee

Bong Hyun You

Cheol-Gon Lee

Jung Hwan Hwang

An Su Lee

Seok Ha Hong

Kyoung Ju Shin

Hyuk Hwan Kim

Kyoung Won Lee

Yoo Mi Ra

Cheol Gon Lee

Dae-Gwang Jang

Hyun Sik Hwang

Masataka Kano

Geun Ho Lee

Tadashi Amino

Gi Geun Kim

Tak-young Lee

Jae Han Chung

Sang Mi Kim

Doo-young Lee

Kyung-ho Park

Ung Gyu Min

Ji Myoung Seo

Alexander Ward

An emission driver is disclosed that includes stages. Each of the stages includes a first circuit part configured to apply a first node voltage to a first node, a second circuit part configured to apply a second node voltage to a second node and connected to the first circuit part through a third node, a third circuit part configured to apply a third node voltage of the third node or a voltage higher than the third node voltage to a fourth node based on the first node voltage and the second node voltage, and a fourth circuit part configured to generate an emission signal based on the first node voltage and a fourth node voltage of the fourth node.

Emission driver and display device including same

A hydrogen storage system for detecting and restricting a pressure difference generated in the hydrogen storage system and a method for adjusting differential pressure therein are provided. The hydrogen storage system includes a controller that controls valves of a plurality of tanks. The controller measures pressure for each tank, measures a pipe pressure of pipe connected with the plurality of tanks, compares the pressure for each tank with the pipe pressure to determine whether differential pressure between the tank and the pipe is generated, determines whether it is expected to generate differential pressure between the tanks in an expected equilibrium temperature, when it is determined that the differential pressure between the tank and the pipe is not generated, and performs pressure equilibrium control between the tanks, when it is expected to generate the differential pressure between the tanks.

Hydrogen storage system and method for adjusting differential pressure therein

A light emitting display device including: a first pixel including a first lower storage electrode, a first gate electrode of a first driving transistor, and a first upper storage electrode; and a second pixel provided near the first pixel, and including a second lower storage electrode, a second gate electrode of a second driving transistor, and a second upper storage electrode. In a plan view, the first gate electrode and the second gate electrode have first sides facing each other, the first side of the first gate electrode is positioned inside a border of the first lower storage electrode or the first upper storage electrode in a plan view, and the first side of the second gate electrode is positioned inside a border of the second lower storage electrode or the second upper storage electrode in a plan view.

Light emitting display device having reduced interference between adjacent pixels

A scan driver for a display device includes a plurality of scan stage groups, each of the scan stage groups including a first scan stage and a second scan stage. The first scan stage includes: a first transistor including a gate electrode coupled to a first Q node, one electrode coupled to a first scan clock line, and another electrode coupled to a first scan line; a second transistor including a gate electrode and one electrode, which are coupled to a first scan carry line, and another electrode coupled to the first Q node; a third transistor including a gate electrode coupled to a first control line and one electrode coupled to a first sensing carry line; a fourth transistor including a gate electrode coupled to the other electrode of the third transistor, one electrode coupled to a second control line, and another electrode coupled to a first node; a first capacitor including one electrode coupled to the one electrode of the fourth transistor and another electrode coupled to the gate electrode of the fourth transistor; a fifth transistor including a gate electrode coupled to a third control line, one electrode coupled to the first node, and another electrode coupled to the first Q node; and a sixth transistor including a gate electrode coupled to the first Q node, one electrode coupled to the second control line, and another electrode coupled to the first node.

Scan driver for a display device with reduced degradation of transistors

A scan driver including a plurality of scan stages. A first scan stage among the plurality of scan stages includes first-to-sixth transistors and a first capacitor. The first transistor is connected to a first Q node, a first scan clock line, and a first scan line. A second transistor is connected to a first scan carry line and the first Q node. A third transistor is connected to a first sensing carry line and a second sensing carry line. A fourth transistor is connected to a first control line and the third transistor. A fifth transistor is connected to the fourth transistor, a second control line, and a first node. A first capacitor is connected to the fifth transistor. A sixth transistor is connected to a third control line, the first node, and the first Q node.

Scan driver

Provided are a scan driver and a display device including the same. The scan driver includes a first power line configured to supply a first voltage signal, a second power line configured to supply a second voltage signal having a lower voltage level than the first voltage signal, a pull-up transistor configured to output a corresponding clock signal, among multiple clock signals, as a scan signal in response to a logic state of a first node, a pull-down transistor configured to output the second voltage signal from the second power line as the scan signal in response to a logic state of a second node, and a first light-blocking film overlapping the pull-up transistor or the pull-down transistor, and configured to receive the second voltage signal from the second power line and the first voltage signal from the first power line.

Scan driver and display device including the same

A display device includes: a first pixel including a first light emitting diode (LED) and a first capacitor including a first electrode connected to a first power source voltage providing a driving voltage to an anode of the first light emitting diode (LED) or to an initialization voltage, and a second electrode connected to the anode of the first light emitting diode (LED); and a second pixel including a second light emitting diode (LED) and a second capacitor including a first electrode connected to the first power source voltage providing the driving voltage to an anode of the second light emitting diode (LED) or to an initialization voltage, and a second electrode connected to the anode of the second light emitting diode (LED), wherein capacitance of the second capacitor is less than capacitance of the first capacitor.

Display device

Scan driver for a display device

A scan driver includes scan stages, an n-th scan stage of the scan stages includes a first driving circuit, a second driving circuit, and an output circuit. The first driving circuit controls a voltage of a first driving node, based on an input signal and a voltage of a second driving node. The second driving circuit controls the voltage of the second driving node, based on a second clock signal and a first voltage. The output circuit outputs a first clock signal as a scan signal and a carry signal, and outputs a second voltage as the scan signal and the carry signal. The first driving circuit includes a first transistor including a gate electrode electrically connected to the second driving node, one electrode electrically connected to an input line that provides the input signal, and another electrode electrically connected to the first driving node.

A scan driver including stages that are connected to scan lines respectively and supply scan signals to the scan lines in response to voltages of 11th and 12th nodes, and a selective drive circuit that is connected to i (i is a natural number of 2 or greater) stages and includes a first node and a second node. Each of the stages includes a first connection transistor that is connected between the first node and the 11th node and a second connection transistor that is connected between the second node and the 12th node. The first connection transistor and the second connection transistor are turned on by a second control signal to electrically connect the first node to the 11th node and the second node to the 12th node, respectively.

The disclosure relates to a stage and a scan driver including the stage. The stage is connected to each of scan lines and supplies a scan signal and a sensing signal to the scan lines. The stage includes an input unit configured to control voltages of a first node and a second node based on a first control signal and a previous stage carry signal, and an output buffer including an eleventh node and a twelfth node electrically connected to the first node and the second node, respectively, in response to a second control signal, and configured to output a carry signal and the scan signal in response to a scan clock signal according to voltages of the eleventh node and the twelfth node and to output the sensing signal in response to a sensing clock signal.

Stage and scan driver including the stage

A pixel includes an organic light-emitting diode (OLED), a storage capacitor, and first to fourth transistors. The first transistor includes a gate electrode (GE), a first electrode (FE), and a second electrode (SE), and is configured to control, in response to a voltage of a first node (FN) coupled to the GE, current supplied from a first power source (PS) coupled to the FE to a second PS via the OLED. The storage capacitor is coupled between the FN and the first PS. The second transistor is coupled between a data line and the first transistor. The third transistor includes a FE coupled to the FN and a SE coupled to the SE of the first transistor. The fourth transistor includes a FE coupled to the FN and a SE coupled to the SE of the first transistor, and is configured to transmit an initialization voltage to the FN.

Pixel and organic light-emitting display device including the same

Growing community of inventors

Yongin-si, South Korea

Jong Hee Kim