Samsung Electronics Co., Ltd.

Jong-chul Shin

Kee-won Joe

Jong-Ho Kim

Hae-Young Rha

Sang-jun Yang

Na-young Kwon

Sang-bong Lee

A display apparatus and a method thereof. The display apparatus includes a display with variable transparency, a sensor which senses a location of at least one of a person and an object, and a controller which determines proximity of the at least one of the person and the object to the display based on a result of the sensing by the sensor, and adjusts the transparency of the display differently according to a result of the determining. Accordingly, a user can easily recognize contents displayed on the display screen having high transparency in the display apparatus.

Display apparatus and method thereof

Provided are a mapping method and a video system for mapping pixel data included in the same pixel group to the same bank of a memory, A method for mapping the position of pixel data of a picture to an address of a memory comprises a pixel group dividing operation and an address mapping operation. The pixel group dividing operation divides the pixels of the picture into at least one pixel group. The address mapping operation maps pixel data of pixels included in the same pixel group to the same bank of the memory.

Mapping method and video system for mapping pixel data included in the same pixel group to the same bank of memory

A data delay control circuit and method that can adaptively reflect changes in an operating environment, such as an operating temperature, an operating voltage and a manufacturing process of a semiconductor chip. The data delay control circuit is designed to be able to adaptibly delay data when an expected delay of a predetermined period should be required when the semiconductor chip is designed. The data delay circuit includes a clock oscillation unit that can reflect changes in a delay period of a delay cell and automatically adjust the delay period of the delay cell. Since the data delay circuit includes a monitoring circuit and a plurality of delay paths, the data delay circuit can provide a delay path having a desired delay value. Therefore, even when the operating environment of a semiconductor device changes, the data delay circuit can control the delay period of a data signal. Consequently, the data delay circuit can automatically generate a data delay signal according to the changes in the operating environment.

Data delay control circuit and method

Provided are an apparatus and method for partially accessing a DRAM. The apparatus for partially accessing a DRAM includes a memory controller. The memory controller includes a first sub-controller which controls a first DRAM and a second sub-controller which controls a second DRAM. Accordingly, a garbage cycle, i.e., an operation which wastes data transfer bandwidth, that may generate when a related art DRAM accessing apparatus is used, is removed.

Apparatus and method of partially accessing dynamic random access memory

A system-on-chip (SOC) having built-in-self-test (BIST) circuits and a self-test method of the SOC are provided. The SOC having the BIST circuits includes intellectual property (IP) blocks having BIST logic circuits and a BIST control unit. The BIST logic circuit operates in a normal or a test mode in response to control data received through a system bus, and outputs test result data in the test mode. The BIST control unit tests the IP blocks by transferring the control data, a command signal, test pattern data, and test address signals to the BIST logic circuit through the system bus, and compresses and stores the test result data received through the system bus in the test mode.

System-on-chip (SOC) having built-in-self-test circuits and a self-test method of the SOC

A bus system including a bus arbiter and a plurality of masters. The bus arbiter grants bus control to one of the plurality of masters. When a master with bus control sends a read command, bus control is transferred to another one of the plurality of masters, thereby increasing the efficiency of the bus system. A method including sending a read command and transferring bus control to another one of a plurality of masters before receiving the response to the read command.

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Suwon-si, South Korea

Jong-chul Shin