Korea Institute of Science and Technology

Jong Chang Yi

Seok Pil Lee

Deok Ha Woo

Jae Hun Kim

Sun Ho Kim

Young Tae Byun

Chulki Kim

Taikjin Lee

Min Ah Seo

Young Min Jhon

Seong Chan Jun

Hwa Sun Park

Youngchul Chung

Yeong Jun Kim

Young Mo Jung

Kyungsun Moon

A method for forming a PN junction in graphene includes: forming a graphene layer, and forming a DNA molecule layer on a partial region of the graphene layer, the DNA molecule layer having a nucleotide sequence structure designed to provide the graphene layer with a predetermined doping property upon adsorption on the graphene layer. The DNA molecule has a nucleotide sequence structure designed for doping of graphene so that doped graphene has a specific semiconductor property. The DNA molecule is coated on the surface of the graphene layer of which the partial region is exposed by micro patterning, and thereby, PN junctions of various structures may be formed by a region coated with the DNA molecule and a non-coated region in the graphene layer.

Method for forming PN junction in graphene with application of DNA and PN junction structure formed using the same

A plasmonic all-optical switch includes a graphene layer, a first dielectric layer located on the graphene layer, a nano-antenna located on the first dielectric layer, and a second dielectric layer located on the nano-antenna. An incident beam is propagated by means of a surface plasmon wave generated at an interface between the graphene layer and the first dielectric layer. Further, localized surface plasmon resonance is selectively generated at an interface between the nano-antenna and the second dielectric layer by means of a pump beam incident to the nano-antenna to decrease an intensity of the incident beam. The plasmonic all-optical switch may operate at an ultrahigh speed just with a small light energy without any electric method, greatly reduce power consumption of an IT device by applying to an all-optical transistor or the like, and increase a processing rate.

Plasmonic all-optical switch and light control method using the same

The present invention relates to an apparatus and a method for realizing all-optical NOR logic device using the gain saturation characteristics of a semiconductor optical amplifier(SOA). More particularly, the invention relates to a 10 Gbit/s all-optical NOR logic device among all-optical logic devices, in which a signal transmitted from a given point of an optical circuit such as an optical computing circuit is used as a pump signal and a probe signal. The method for realizing an all-optical NOR logic device using the gain saturation characteristics of the SOA according to the present invention comprises the steps of: utilizing A+B signal which couples together an input signal pattern A () and an input signal pattern B () as a pump signal (); utilizing a probe signal () by generating a clock signal out of said input signal pattern A (); and obtaining a Boolean equation {overscore (A+B)} by making said probe signal and said pump signal incident upon the SOA simultaneously from the opposite direction. The all-optical logic device according to the present invention has a simple construction since it is realized through the XGM (Cross Gain Modulation) method which utilizes the gain saturation characteristics. Also, it is expected that the method employed in the present invention could be used for realizing other all-optical logic circuits and devices.

Apparatus and method for realizing all-optical NOR logic device using gain saturation characteristics of a semiconductor optical amplifier

A fabrication method of an epilayer structure for InGaAsP/InP ridge waveguide phase modulator with high phase modulation efficiency. It relates to a P-p-n-N InGaAsP/InP ridge waveguide phase modulator fabricated to be that the phase change of the TE-mode is linearly proportional to the reverse bias voltage at 1.55 &#x3bc;m wavelength. A method for fabricating an epilayer structure for achieving the optical confinement in the vertical direction of an InGaAsP/InP waveguide phase modulator, characterized by comprising the steps of: forming a first cladding layer of N-InP on an N-InP substrate; forming a first waveguide layer of n-InGaAsP and a second waveguide layer of p-InGaAsP in sequence on the first cladding layer; forming a second cladding layer of P-InP and a third cladding layer of P-InP in sequence on the second waveguide layer; and forming an electrode layer of pInGaAs on the third cladding layer.

Fabrication method of an epilayer structure InGaAsP/InP ridge waveguide phase modulator with high phase modulation efficiency

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Seoul, South Korea

Jong Chang Yi