Hynix Semiconductor Inc.

Jong-Bum Park

Kyong-Min Kim

Hoon-Jung Oh

Han-Sang Song

Jong-Kook Park

A method for forming a capacitor dielectric includes depositing a tantalum oxide layer over a substrate, performing a post-treatment on the tantalum oxide layer to provide the tantalum oxide layer with a tetragonal phase, and depositing a zirconium oxide layer over the tantalum oxide layer such that the zirconium oxide layer has a tetragonal phase.

Method for forming a capacitor dielectric having tetragonal phase

A capacitor includes a lower electrode, a first dielectric layer formed over the lower electrode, a second dielectric layer formed over the first dielectric layer, wherein the second dielectric layer includes an amorphous high-k dielectric material, a third dielectric layer formed over the second dielectric layer, and an upper electrode formed over the third dielectric layer. The third dielectric layer can be thicker than the first dielectric layer.

Capacitor and method for fabricating the same

A semiconductor device, includes: a first storage node contact plug penetrating a first interlayer insulation layer and partially protruding above the first interlayer insulation layer; a second storage node contact plug contacting the first storage node contact plug that protrudes above the first interlayer insulation layer; a storage node contacting a top surface of the second storage node contact plug; and a second interlayer insulation layer formed over the first interlayer insulation layer, wherein the second interlayer insulation layer surrounds an outer sidewall at a bottom region of the first storage node, and the second storage node contact plug, and wherein the first storage node contact plug protruding above the first interlayer insulation layer and the second storage node contact plug.

Semiconductor device and method of fabricating the same

A method for fabricating a semiconductor device includes: forming an etch stop pattern over a conductive layer, the etch stop pattern having a first opening exposing a top surface of the conductive layer; forming an insulation layer over the etch stop pattern; selectively etching the insulation layer to form a second opening exposing the top surface of the conductive layer; and enlarging the second opening until the etch stop pattern is exposed.

Method for fabricating semiconductor device

A capacitor includes a lower electrode, a first dielectric layer formed over the lower electrode, a second dielectric layer formed over the first dielectric layer, wherein the second dielectric layer includes an amorphous high-k dielectric material, a third dielectric layer formed over the second dielectric layer, and an upper electrode formed over the third dielectric layer.

A dielectric layer of a capacitor includes a first dielectric layer, a second dielectric layer formed over the first dielectric layer, the second dielectric layer having a dielectric constant lower than that of the first dielectric layer, and a third dielectric layer formed over the second dielectric layer, the third dielectric layer having a dielectric constant higher that of than the second dielectric layer, wherein the third dielectric layer has a greater thickness than each of the first and second dielectric layers.

Multiple-layer dielectric layer and method for fabricating capacitor including the same

A method for forming a capacitor dielectric includes depositing a zirconium oxide layer, performing a post-treatment on the zirconium oxide layer such that the zirconium oxide layer has a tetragonal phase, and depositing a tantalum oxide layer over the zirconium oxide layer such that the tantalum oxide layer has a tetragonal phase.

Method for forming a capacitor dielectric and method for manufacturing capacitor using the capacitor dielectric

The present invention is related to a method for fabricating a capacitor capable of preventing a contact between neighboring lower electrodes even if a height of the lower electrode increases. The lower electrode is formed to have a critical dimension wider at a bottom region than at a top region to thereby be firmly supported. Also, a wider distance between the lower electrodes prevents neighboring lower electrodes from contacting to each other. As a result of these effects, it is possible to prevent a failure of dual bit, which eventually results in higher yields of semiconductor devices.

Method for fabricating capacitor

The present invention relates to a method for fabricating a capacitor in a semiconductor device capable of preventing a decrease in capacitance and improving a leakage current characteristic. The inventive method includes the steps of: forming a lower electrode on a substrate; cleaning the lower electrode with use of HF and NH OH; nitrifying the lower electrode through a NH annealing; depositing a nitride layer on the nitrified lower electrode; and forming sequentially a dielectric material and an upper electrode on the nitride layer.

Method for fabricating capacitor in semiconductor device

This invention provides a capacitor and a method for manufacturing of the same, which are adaptable to preventing a lower electrode from being oxidized at a following thermal process. The capacitor includes: a lower electrode; an oxidation barrier layer formed on the lower electrode, wherein the oxidation barrier layer is formed of at least double nitridation layers; a dielectric layer formed on the oxidation barrier layer; and an upper electrode formed on the dielectric layer.

Capacitor with oxidation barrier layer and method for manufacturing the same

A method for manufacturing a capacitor including forming an electrode with a top portion having relatively smaller width than its bottom portion. The method includes the steps of: forming a seed layer on a semiconductor substrate; forming a first insulating layer on the seed layer; forming an opening unit which has relatively larger width in a top portion than a bottom portion by selectively etching the first insulating layer and the seed layer; forming a second insulating layer on the seed layer which is exposed after forming the opening unit; removing the first insulating layer using an etching which uses a selective etching ratio between the first insulating layer and the second insulating layer; after removing the first insulating layer, forming a bottom electrode on the exposed seed layer using an electro plating (EP) method; and removing the second insulating layer.

Method for manufacturing a capacitor

The present invention relates to a method for fabricating a capacitor in a semiconductor device; and, more particularly, to a method for fabricating a capacitor capable of stably forming a nitride layer on a lower electrode and obtaining improvements on stable capacitance and leakage current characteristics. The inventive method for fabricating a capacitor includes the steps of: forming a lower electrode on a substrate; forming a nitride-based first dielectric thin layer on the lower electrode; forming a second dielectric thin layer by depositing an Al O layer on the nitride-based first dielectric thin layer; forming a third dielectric thin layer on the second dielectric thin layer; and forming an upper electrode on the third dielectric thin layer.

Growing community of inventors

Ichon-shi, South Korea

Jong-Bum Park